This reverts commit 89b144ec. See
https://reviews.llvm.org/D141998 for a test case where this goes wrong.

Previously COUNT would cast the mask input to logical<4> before passing it
to the runtime function, this has been changed to allow different types of logical.

Reviewed By: tblah

Differential Revision: https://reviews.llvm.org/D144867

It is only used to infer the types of offset parameters in isel patterns,
which we can specify directly.

Reviewed By: piotr

Differential Revision: https://reviews.llvm.org/D144890

The new function has been added to SCEV that allows to raise the number 2
to the desired power.

Authored-by: Dmitry Bakunevich

Differential Revision: https://reviews.llvm.org/D144381

Previously, while calculating register usage due to invariants, it was assumed that invariant would always be part of widening
instructions. This resulted in calculating vector register types for vectors which cant be legalized(check the newly added test for more details).

An invariant might not always need a vector register. For e.g., invariant might just be used for iteration check.

This patch checks if the invariant is part of any widening instruction and considers register usage accordingly. Fixes issue 60493

Differential Revision: https://reviews.llvm.org/D143422

Depends on: D144717

Differential Revision: https://reviews.llvm.org/D144856

Depends on: D144656

Differential Revision: https://reviews.llvm.org/D144717

All exceptions thrown in coroutine bodies are caught and
unhandled_exception member of the coroutine promise type is called.
In accordance with the existing rules of diagnostics related to
exceptions thrown in functions marked noexcept, even if the promise
type's constructor, get_return_object, or unhandled_exception
throws, diagnostics should not be emitted.

Fixes #48797.

Differential Revision: https://reviews.llvm.org/D144352

Split tests for D144468. Adding a test with an icmp constant expression
stopped CleanupPointerRootUsers from being called. Move it to a
separate test.

Do not compute BFI if PGO is not used. This addresses the
compile-time regression from https://reviews.llvm.org/D144769.

Observing test failure for llvm/test/Transforms/LoopVectorize/AArch64/reg-usage.ll

This reverts commit d1628266.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D144942

This is already implied by getLoopPassPreservedAnalyses.

Differential Revision: https://reviews.llvm.org/D144860
Reviewed By: nikic, skatkov

This better describes what this method does.

This fixes a possible issue when we could hoist an instruction up to a widenable
condition intrinsic call without making sure its operands are available at
hoisiting point.

Recently insertion point finding algorithm changed a bit, so this availability
check became necessary.

Verifier would crash after we handled the following special case:
  L >u C0 && L >u C1  ->  L >u max(C0, C1),
Previously we would insert the new condition right before the widenable condition
branch where all L operands were available.
Now we may choose the widenable condition intrinsic call as insertion point and it may
happen so that the L operands are computed after the call, so we have to make sure that
L operands are available at the point we want to insert it.

Differential Revision: https://reviews.llvm.org/D144944

Improve indentation for better readability.

Before:
```
Domain: 0, Range: 2, Symbols: 2, Locals: 1
5 constraints
(None	Value	Value	Value	Local	const)
1 1 0 -1 0 0 = 0
0 1 -1 0 0 0 >= 0
0 0 1 -1 2 2 >= 0
0 0 -1 1 -2 -1 >= 0
0 -1 1 0 2 0 >= 0
```

After:
```
Domain: 0, Range: 2, Symbols: 2, Locals: 1
5 constraints
(None	Value	Value	Value	Local	const)
 1	1	0	-1	0	0	= 0
 0	1	-1	0	0	0	>= 0
 0	0	1	-1	2	2	>= 0
 0	0	-1	1	-2	-1	>= 0
 0	-1	1	0	2	0	>= 0
```

Differential Revision: https://reviews.llvm.org/D144854

It hoits instruction without making sure its operands are
available at hoisiting point.

The revision renames LLVMOpsInterfaces.td since the the tablegen file
contains op and type interfaces.

Reviewed By: ftynse, Dinistro

Differential Revision: https://reviews.llvm.org/D144875

(X & X) <  0 --> X == MinSignedC
(X & X) > -1 --> X != MinSignedC

Alive2: https://alive2.llvm.org/ce/z/_J5q3S
Closes: https://github.com/llvm/llvm-project/issues/60957



Signed-off-by: Jun Zhang <jun@junz.org>

Differential Revision: https://reviews.llvm.org/D144777

We can use the Record* to uniquely identify the Record without using
its name.

Similar to ARM and SystemZ.

Related Patchs: D101778(preferZeroCompareBranch)
https://reviews.llvm.org/rG9a9421a461166482465e786a46f8cced63cd2e9f   ( == 0 to u< 1）

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D142071

I found the issue in a donwstream project. But the case looks fine in
the upstream. Add the test to make sure that it wouldn't happen in the
upstream.

Uniformity analysis is mainly concerned with the uniformity of values. But it is
sometimes useful to ask if an instruction is uniform, for example, if the
instruction is a terminator. On LLVM IR, every Instruction is a Value, so the
queries like isUniform() need to be overloaded so that the most derived class
always wins.

Reviewed By: ruiling

Differential Revision: https://reviews.llvm.org/D144699

Previously, while calculating register usage due to invariants, it was assumed that invariant would always be part of widening
instructions. This resulted in calculating vector register types for vectors which cant be legalized(check the newly added test for more details).

An invariant might not always need a vector register. For e.g., invariant might just be used for iteration check.

This patch checks if the invariant is part of any widening instruction and considers register usage accordingly. Fixes issue 60493

Differential Revision: https://reviews.llvm.org/D143422

Fix upper bound constraint addition in addAffineParallelOpDomain; it was
off by one in the case of constants.

Differential Revision: https://reviews.llvm.org/D144836

This improves the readability of address space

Reviewed By: enh

Differential Revision: https://reviews.llvm.org/D144898

In AVRFrameLowering::spillCalleeSavedRegisters(), when a 16-bit
livein register is spilled, two PUSH instructions are generated
for the higher and lower 8-bit registers. But these two 8-bit
registers are marked as killed in the two PUSH instructions, so
any future use of them will cause a crash.

This patch fixes the above issue by adding the two sub 8-bit
registers to the livein list.

Fixes https://github.com/llvm/llvm-project/issues/56423

Reviewed By: jacquesguan

Differential Revision: https://reviews.llvm.org/D144720

These are part of the optimization pipeline, of which the legacy pass manager version is deprecated and being removed.

`emitPrologue` may insert stack pointer adjustment in tail call optimized functions where the callee argument stack size is bigger than the caller's. In such a case, the adjustment must be taken into account when generating CFA directives.

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D143618

LLVM_DUMP_METHOD includes ATTRIBUTE_NOINLINE. operator<< isn't
what we normally consider a dump method so it should be ok to inline.

This fixes a warning from gcc that some other declaration for some
other class was inline but this one is noinline. Seems like a bogus
warning from gcc really.

isSizelessBuiltinType includes RISC-V vector and WebAssembly reference
types. This code is not applicable to those types.

The old code didn't actually align the values, and it added padding even
when none was necessary. This approach will pad entries if necessary
and, similar to the struct case, use the host pointer as guidance.

NOTE: This does still not align them as the host has, but it's unclear
      if the user really should use the alignment bits anyway. For now
      this is a reasonable compromise, only if we have host alignment
      information (explicitly not implicitly via the host pointer), we
      could do it completely right without wasting lots of resources for
      >99% of the cases.

Fixes: https://github.com/llvm/llvm-project/issues/61034

- Make `IterOfRange` and `ValueOfRange` work with types that require
  custom `begin`/`end` functions.
- Allow for `adl_begin`/`adl_end` to be used in constant-evaluated
  contexts.
- Use SFINAE-friendly trailing return type deductions `adl_begin`/`adl_end` so that they are useable in template argument deduction.
- Add missing documentation comments.

This is required for future work in https://reviews.llvm.org/D144503.

Reviewed By: dblaikie, zero9178

Differential Revision: https://reviews.llvm.org/D144583

Update function bodies to forward forwarding references.
I spotted this while authoring a clang-tidy tool for CppCoreGuideline F.19

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D143877

Such a type is never going to have a ctor home, and may be used for type
punning or other ways of creating objects.

May be a more generally acceptable solution in some cases compared to
attributing with [[clang::standalone_debug]].

Differential Revision: https://reviews.llvm.org/D144931

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D144442

There are a variety of cases where we want more control over the exact
instruction emitted. This commit creates a new pass to fixup
instructions after the DAG has been lowered. The pass is only meant to
replace instructions that are guranteed to be interchangable, not to
do analysis for special cases.

Handling these instruction changes in in X86ISelLowering of
X86ISelDAGToDAG isn't ideal, as its liable to either break existing
patterns that expected a certain instruction or generate infinite
loops.

As well, operating as the MachineInstruction level allows us to access
scheduling/code size information for making the decisions.

Currently only implements `{v}permilps` -> `{v}shufps/{v}shufd` but
more transforms can be added.

Differential Revision: https://reviews.llvm.org/D143787