1. Sep 09, 2020
    • Azharuddin Mohammed's avatar
      Update clang/test/Driver/darwin-infer-simulator-sdkroot.c · d95ef009
      Azharuddin Mohammed authored
       - Fix it to work on Apple Silicon
       - Add testcases for simulators running on Apple Silicon
      d95ef009
    • Nikita Popov's avatar
      [InstCombine] Fold comparison of abs with int min · f6b87da0
      Nikita Popov authored
      If the abs is poisoning, this is already folded to true/false.
      For non-poisoning abs, we can convert this to a comparison with
      the operand.
      f6b87da0
    • Nikita Popov's avatar
      6eef387d
    • Nikita Popov's avatar
      [InstCombine] Fold abs of known negative operand · e97f3b1b
      Nikita Popov authored
      If we know that the abs operand is known negative, we can replace
      it with a neg.
      
      To avoid computing known bits twice, I've removed the fold for the
      non-negative case from InstSimplify. Both the non-negative and the
      negative case are handled by InstCombine now, with one known bits call.
      
      Differential Revision: https://reviews.llvm.org/D87196
      e97f3b1b
    • Xun Li's avatar
      [Coroutine] Make dealing with alloca spills more robust · 59a467ee
      Xun Li authored
      D66230 attempted to fix a problem where when there are allocas used before CoroBegin.
      It keeps allocas and their uses stay in put if there are no escapse/changes to the data before CoroBegin.
      Unfortunately that's incorrect.
      Consider this code:
      
      %var = alloca i32
      %1 = getelementptr .. %var; stays put
      %f = call i8* @llvm.coro.begin
      store ... %1
      After this fix, %1 will now stay put, however if a store happens after coro.begin and hence modifies the content, this change will not be reflected in the coroutine frame (and will eventually be DCEed).
      To generalize the problem, if any alias ptr is created before coro.begin for an Alloca and that alias ptr is latter written into after coro.begin, it will lead to incorrect behavior.
      
      There are also a few other minor issues, such as incorrect dominate condition check in the ptr visitor, unhandled memory intrinsics and etc.
      Ths patch attempts to fix some of these issue, and make it more robust to deal with aliases...
      59a467ee
    • Craig Topper's avatar
      [X86] SSE4_A should only imply SSE3 not SSSE3 in the frontend. · e6bb4c8e
      Craig Topper authored
      SSE4_1 and SSE4_2 due imply SSSE3. So I guess I got confused when
      switching the code to being table based in D83273.
      
      Fixes PR47464
      e6bb4c8e
    • Paul C. Anagnostopoulos's avatar
    • Ties Stuij's avatar
      Revert "[ARM] Follow AACPS standard for volatile bit-fields access width" · d6f3f612
      Ties Stuij authored
      This reverts commit 514df1b2.
      
      Some of the buildbots got llvm-lit errors on CodeGen/volatile.c
      d6f3f612
    • Simon Pilgrim's avatar
      cd5c5c48
    • Simon Pilgrim's avatar
      RISCVMatInt.h - remove unnecessary includes. NFCI. · 0dacf3b5
      Simon Pilgrim authored
      Add APInt forward declaration and move include to RISCVMatInt.cpp
      0dacf3b5
    • Fangrui Song's avatar
      [sanitizers] Remove unneeded MaybeCall*DefaultOptions() and nullptr checks · 2d7fd38c
      Fangrui Song authored
      D28596 added SANITIZER_INTERFACE_WEAK_DEF which can guarantee `*_default_options` are always defined.
      The weak attributes on the `__{asan,lsan,msan,ubsan}_default_options` declarations can thus be removed.
      
      `MaybeCall*DefaultOptions` no longer need nullptr checks, so their call sites can just be replaced by `__*_default_options`.
      
      Reviewed By: #sanitizers, vitalybuka
      
      Differential Revision: https://reviews.llvm.org/D87175
      2d7fd38c
    • Mehdi Amini's avatar
    • Krzysztof Parzyszek's avatar
    • Ties Stuij's avatar
      [ARM] Follow AACPS standard for volatile bit-fields access width · 514df1b2
      Ties Stuij authored
      This patch resumes the work of D16586.
      According to the AAPCS, volatile bit-fields should
      be accessed using containers of the widht of their
      declarative type. In such case:
      ```
      struct S1 {
        short a : 1;
      }
      ```
      should be accessed using load and stores of the width
      (sizeof(short)), where now the compiler does only load
      the minimum required width (char in this case).
      However, as discussed in D16586,
      that could overwrite non-volatile bit-fields, which
      conflicted with C and C++ object models by creating
      data race conditions that are not part of the bit-field,
      e.g.
      ```
      struct S2 {
        short a;
        int  b : 16;
      }
      ```
      Accessing `S2.b` would also access `S2.a`.
      
      The AAPCS Release 2020Q2
      (https://documentation-service.arm.com/static/5efb7fbedbdee951c1ccf186?token=)
      section 8.1 Data Types, page 36, "Volatile bit-fields -
      preserving number and width of container accesses" has been
      updated to avoid conflict with the C++ Memory Model.
      Now it reads in the note:
      ```
      This ABI does not place any restrictions on the access widths of bit-fields where the container
      overlaps with a non-bit-field member or where the container overlaps with any zero length bit-field
      placed between two other bit-fields. This is because the C/C++ memory model defines these as being
      separate memory locations, which can be accessed by two threads simultaneously. For this reason,
      compilers must be permitted to use a narrower memory access width (including splitting the access into
      multiple instructions) to avoid writing to a different memory location. For example, in
      struct S { int a:24; char b; }; a write to a must not also write to the location occupied by b, this requires at least two
      memory accesses in all current Arm architectures. In the same way, in struct S { int a:24; int:0; int b:8; };,
      writes to a or b must not overwrite each other.
      ```
      
      Patch D16586 was updated to follow such behavior by verifying that we
      only change volatile bit-field access when:
       - it won't overlap with any other non-bit-field member
       - we only access memory inside the bounds of the record
       - avoid overlapping zero-length bit-fields.
      
      Regarding the number of memory accesses, that should be preserved, that will
      be implemented by D67399.
      
      Differential Revision: https://reviews.llvm.org/D72932
      
      The following people contributed to this patch:
      - Diogo Sampaio
      - Ties Stuij
      514df1b2
    • Volkan Keles's avatar
    • Heejin Ahn's avatar
      [WebAssembly] Fix fixEndsAtEndOfFunction for try-catch · d25c17f3
      Heejin Ahn authored
      When the function return type is non-void and `end` instructions are at
      the very end of a function, CFGStackify's `fixEndsAtEndOfFunction`
      function fixes the corresponding block/loop/try's type to match the
      function's return type. This is applied to consecutive `end` markers at
      the end of a function. For example, when the function return type is
      `i32`,
      ```
      block i32    ;; return type is fixed to i32
        ...
        loop i32   ;; return type is fixed to i32
          ...
        end_loop
      end_block
      end_function
      ```
      
      But try-catch is a little different, because it consists of two parts:
      a try part and a catch part, and both parts' return type should satisfy
      the function's return type. Which means,
      ```
      try i32      ;; return type is fixed to i32
        ...
        block i32  ;; this should be changed i32 too!
          ...
        end_block
      catch
        ...
      end_try
      end_function
      ```
      As you can see in this example, it is not sufficient to only `end`
      instructions at the end of a function; in case of `try`, we should
      check instructions before `catch`es, in case their corresponding `try`'s
      type has been fixed.
      
      This changes `fixEndsAtEndOfFunction`'s algorithm to use a worklist
      that contains a reverse iterator, each of which is a starting point for
      a new backward `end` instruction search.
      
      Fixes https://bugs.llvm.org/show_bug.cgi?id=47413.
      
      Reviewed By: dschuff, tlively
      
      Differential Revision: https://reviews.llvm.org/D87207
      d25c17f3
    • Simon Pilgrim's avatar
      LiveRegUnits.h - reduce MachineRegisterInfo.h include. NFC. · 3c83b967
      Simon Pilgrim authored
      We only need to include MachineInstrBundle.h, but exposes an implicit dependency in MachineOutliner.h.
      
      Also, remove duplicate includes from LiveRegUnits.cpp + MachineOutliner.cpp.
      3c83b967
    • Lubomir Litchev's avatar
      Add an option for unrolling loops up to a factor. · e2394245
      Lubomir Litchev authored
      Currently, there is no option to allow for unrolling a loop up to a specific factor (specified by the user).
      The code for doing that is there and there are benefits when unrolling is done  to smaller loops (smaller than the factor specified).
      
      Reviewed By: bondhugula
      
      Differential Revision: https://reviews.llvm.org/D87111
      e2394245
    • Heejin Ahn's avatar
      [clang-tidy] Fix linking for FrontendOpenMP · 71133e8b
      Heejin Ahn authored
      Without this, builds with `-DBUILD_SHARED_LIBS=ON` fail.
      71133e8b
  2. Sep 08, 2020