After aed965d5 we no longer demangle and store the full name. The
test was updated accordingly but the comment still specified that we
should be able to find the symbol by its full demangled name.

This makes the method compatible with opaque pointers.

Turns out there's still some code referencing this. No harm in keeping it in a
bit longer.

> as it was planned for removal in clang 15 and we're now past the branch point
>
> See https://github.com/llvm/llvm-project/issues/19107
>
> Differential revision: https://reviews.llvm.org/D118762

This reverts commit 564f9be1.

I dropped this argument in cdc0573f,
but did not adjust mlir. (Or rather I did, but I modified a generated
file ... oops)

We were dropping the [gs] modifier by parsing it in parseExpr, but not
forwarding it on to parseUnresolvedName.  This is the straightforwards
fix to forward that flag -- parseExpr must see past it.

Reviewed By: ChuanqiXu

Differential Revision: https://reviews.llvm.org/D118504

The StdQualifiedName node class is used for names exactly in the std
namespace.  It is not used for nested names that descend further --
those use a NestedName with NameType("std") as the scope.
Representing the compression scheme in the node graph is layer
breaking.  We can use the same structure for those exactly in std too,
and reduce code size a bit.

Reviewed By: ChuanqiXu

Differential Revision: https://reviews.llvm.org/D118249

AArch32/Armv8A  introduced the performance deprecation of certain patterns
of IT instructions.  After some debate internal to ARM, this is now being
reverted; i.e. no IT instruction patterns are performance deprecated
anymore, as the perfomance degredation is not significant enough.

This reverts the following:

"ARMv8-A deprecates some uses of the T32 IT instruction. All uses of
IT that apply to instructions other than a single subsequent 16-bit
instruction from a restricted set are deprecated, as are explicit
references to the PC within that single 16-bit instruction. This permits
the non-deprecated forms of IT and subsequent instructions to be treated
as a single 32-bit conditional instruction."

The deprecation no longer applies, but the behaviour may be controlled
by the -arm-restrict-it and -arm-no-restrict-it command-line options,
with the latter being the default. No warnings about complex IT blocks
will be generated.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D118044

IRBuilderBase exists specifically to avoid the need for this.

LLVM Embedded Toolchains working group regular sync up calls to start in early
March, adding details to the table of sync ups for general reference.

Differential Revision: https://reviews.llvm.org/D118884

This is effectively inverting the transform added with D116804
because the downside of the false dependency of something like
"sbb %eax, %eax" is much greater than the upside of eliminating
a zeroing instruction on (all?) Intel CPUs.

Differential Revision: https://reviews.llvm.org/D118843

If we had a large offset which required materializing in a register,
we would emit an s_add_i32, clobbering SCC. Start checking if SCC is
live, and instead use a VGPR offset. For MUBUF, we switch to using
offen. We would do this anyway in a normal load/store with a frame
index, but not for spills.

The same problem still exists in other contexts where we expand frame
indices.

The nasty edge case is when SGPRs are spilled to memory at a large
frame offset where SCC is also clobbered. This requires a second
scavenging index, and also required several patches in the scavenger
to correctly handle multiple recursive scavenge indexes.

An even nastier edge case we still don't support is if we don't have
any free SGPRs. If SCC is live and we don't have any free SGPRs to
save exec, we have no way of flipping exec back and forth without also
clobbering SCC.

Fixes: SWDEV-309419

This patch modifies the FCOPYSIGN lowering to go through the BSP
pseudo-instruction. This allows the same lowering code for NEON,
SVE and SVE2.

As part of this, lowering for BSP for SVE and SVE2 is also added.

For SVE and NEON this patch is NFC.

Differential Revision: https://reviews.llvm.org/D118394

A significant number of our tests in C accidentally use functions
without prototypes. This patch converts the function signatures to have
a prototype for the situations where the test is not specific to K&R C
declarations. e.g.,

  void func();

becomes

  void func(void);

This is the third batch of tests being updated (there are a significant
number of other tests left to be updated).

- Add or remove empty lines surrounding union blocks.
- Fixes https://github.com/llvm/llvm-project/issues/53229, in which
  keywords like class and struct in a line ending with left brace or
  whose next line is left brace only, will be falsely recognized as
  definition line, causing extra empty lines inserted surrounding blocks
  with no need to be formatted.

Reviewed By: MyDeveloperDay, curdeius, HazardyKnusperkeks, owenpan
Differential Revision: https://reviews.llvm.org/D119067

In preparation for adding new tests. No functional change.

m_name is confusing, as there is a getter called GetName, but it returns
a completely different thing.

Fixed a "override" related warning in SharedPtrArrayMismatchCheck.h.
Related to differential revision: https://reviews.llvm.org/D117306

https://alive2.llvm.org/ce/z/AXPr3k

Use the value type instead.

Another step moving away from the deprecated syntax of specifying
pass pipeline in opt.

Differential Revision: https://reviews.llvm.org/D119081

Another step moving away from the deprecated syntax of specifying
pass pipeline in opt.

Differential Revision: https://reviews.llvm.org/D119080

Looks like I missed this call when removing others in this file.

D43208 extracted `useEmulatedMaskMemRefHack()` from legality into cost model.
What it essentially does is prevents scalarized vectorization of masked memory operations:
```
  // TODO: Cost model for emulated masked load/store is completely
  // broken. This hack guides the cost model to use an artificially
  // high enough value to practically disable vectorization with such
  // operations, except where previously deployed legality hack allowed
  // using very low cost values. This is to avoid regressions coming simply
  // from moving "masked load/store" check from legality to cost model.
  // Masked Load/Gather emulation was previously never allowed.
  // Limited number of Masked Store/Scatter emulation was allowed.
```

While i don't really understand about what specifically `is completely broken`
was talking about, i believe that at least on X86 with AVX2-or-later,
this is no longer true. (or at least, i would like to know what is still broken).
So i would like to follow suit after D111460, and like wise disable that hack for AVX2+.

But since this was added for X86 specifically, let's just instead completely remove this hack.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D114779

Once D119073 has landed, I'll start addressing these

Update tests to check runtime checks a bit more precisely.

Reviewed By: LegalizeAdulthood

Differential Revision: https://reviews.llvm.org/D117306

`DebugInfo/Generic/missing-abstract-variable.ll` `FAIL`s on SPARC.  When
`x` is inlined into `a`, the variable `s` is elided completely, so the
corresponding `CHECK`s fail.  Exactly the same happens on RISCV and the
test has already been `XFAIL`ed there.

This patch does the same on SPARC.

Tested on `sparcv9-sun-solaris2.11`.

Differential Revision: https://reviews.llvm.org/D119122

This was supposed to be part of
ec18030f.

Handle character constant ofr error code in the STOP statement.

Depends on D118992

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: kiranchandramohan, schweitz

Differential Revision: https://reviews.llvm.org/D118993

Lower character constant of KIND = 1 with the
`createStringLiteral` helper function.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: kiranchandramohan, schweitz

Differential Revision: https://reviews.llvm.org/D118992

We should make sure that the value ID is in bounds, otherwise
we will assert / read out of bounds.

Instead of simply assuming that it will be zero. I double checked
that the bitstream reader doesn't have any special handling for
all-zero blobs, it will always write out the full contents.

Report an error instead.

If we're trying to reserve more memory than bits in the stream,
reject this early to avoid OOM.

AbstractConverter private variable is currently not used
and triggers a buildbot failure.

https://lab.llvm.org/buildbot/#/builders/180/builds/3119

This fixes the buildbot.