- Oct 10, 2018
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George Karpenkov authored
Some seem fragile, some fail, and some just take a really long time to run. It does not seem to make sense to support some subset of value profiling tests. Differential Revision: https://reviews.llvm.org/D53047 llvm-svn: 344105
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George Karpenkov authored
Without this change, tests in coverage.test and dump_coverage.test are failing on non-x86_64 platforms. The diff is copied from sanitizer_common library, an alternative would be to link it together with libFuzzer. Differential Revision: https://reviews.llvm.org/D53040 llvm-svn: 344104
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George Karpenkov authored
sancov subtracts one from the address to get the previous instruction, which makes sense on x86_64, but not on other platforms. This change ensures that the offset is correct for different platforms. The logic for computing the offset is copied from sanitizer_common. Differential Revision: https://reviews.llvm.org/D53039 llvm-svn: 344103
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Jim Ingham authored
Differential Revision: https://reviews.llvm.org/D53010 llvm-svn: 344102
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Erik Pilkington authored
These two diagnostics are noisy, so its reasonable for users to opt-out of them when -Wconversion is enabled. rdar://45058981 Differential revision: https://reviews.llvm.org/D53048 llvm-svn: 344101
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Ed Maste authored
When ifunc support was added to Clang (r265917) it did not allow resolvers to take function arguments. This was based on GCC's documentation, which states resolvers return a pointer and take no arguments. However, GCC actually allows resolvers to take arguments, and glibc (on non-x86 platforms) and FreeBSD (on x86 and arm64) pass some CPU identification information as arguments to ifunc resolvers. I believe GCC's documentation is simply incorrect / out-of-date. FreeBSD already removed the prohibition in their in-tree Clang copy. Differential Revision: https://reviews.llvm.org/D52703 llvm-svn: 344100
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Fangrui Song authored
Summary: Before, OptTable::PrintHelp append "[options] <inputs>" to its parameter `Help`. It is more flexible to change its semantic to `Usage` and let user customize the usage line. Reviewers: rupprecht, ruiu, espindola Reviewed By: rupprecht Subscribers: emaste, sbc100, arichardson, aheejin, llvm-commits Differential Revision: https://reviews.llvm.org/D53054 llvm-svn: 344099
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Fangrui Song authored
Summary: This is to accommodate a change in llvm/lib/Option/OptTable.cpp D51009 Reviewers: rupprecht, alexshap, jhenderson Reviewed By: rupprecht Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D51109 llvm-svn: 344098
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Fangrui Song authored
[opt] Change the parameter of OptTable::PrintHelp from Name to Usage and don't append "[options] <inputs>" Summary: Before, "[options] <inputs>" is unconditionally appended to the `Name` parameter. It is more flexible to change its semantic to `Usage` and let user customize the usage line. % llvm-objcopy ... USAGE: llvm-objcopy <input> [ <output> ] [options] <inputs> With this patch: % llvm-objcopy ... USAGE: llvm-objcopy input [output] Reviewers: rupprecht, alexshap, jhenderson Reviewed By: rupprecht Subscribers: jakehehrlich, mehdi_amini, steven_wu, dexonsmith, llvm-commits Differential Revision: https://reviews.llvm.org/D51009 llvm-svn: 344097
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Aaron Puchert authored
Summary: Scoped capabilities need to be annotated as such, otherwise the thread safety analysis won't work as intended. Fixes PR39234. Reviewers: ldionne Reviewed By: ldionne Subscribers: christof, libcxx-commits Differential Revision: https://reviews.llvm.org/D53049 llvm-svn: 344096
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Zachary Turner authored
This patch fixes three issues. The first is that we didn't consider files which are explicitly set to eolstyle CRLF in the repo, and there are a handful of these. Second is that dos2unix doesn't have a -q option in GnuWin32, so this codepath wasn't working properly. Finally with newer versions of Python (or newer versions of Git, or some combination of the two) patches can't be applied when we treat stdin as text, because Python silently undoes all the work we did to convert the newlines to LF using dos2unix by using universal_newlines=True and then converting them *back* to CRLF. So we need to add a way to force stdin to be treated as binary, and use it when LF-newlines are required. Differential Revision: https://reviews.llvm.org/D51444 llvm-svn: 344095
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Thomas Lively authored
Summary: Also add tests to catch crashes in passes that are not normally run in tests. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52959 llvm-svn: 344094
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Nemanja Ivanovic authored
We already do the following combines: (bitcast int (and (bitcast fp X to int), 0x7fff...) to fp) -> fabs X (bitcast int (xor (bitcast fp X to int), 0x8000...) to fp) -> fneg X When the target has "bit preserving fp logic". This patch just extends it to also combine: (bitcast int (or (bitcast fp X to int), 0x8000...) to fp) -> fneg (fabs X) As some targets have fnabs and even those that don't can efficiently lower both the fabs and the fneg. Differential revision: https://reviews.llvm.org/D44548 llvm-svn: 344093
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Rong Xu authored
Fix the memory issue exposed by sanitizer. llvm-svn: 344092
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Nemanja Ivanovic authored
This just adds the test case so that the different code gen is clearly visible when the DAG Combine lands. llvm-svn: 344091
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Rui Ueyama authored
llvm-svn: 344089
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Rui Ueyama authored
llvm-svn: 344088
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Justin Bogner authored
This test uses an x86 triple, so it needs to be in the x86 specific test directory. llvm-svn: 344087
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Heejin Ahn authored
Summary: - Categorize instructions into the categories as in the SIMD spec - Move SIMD-related definition to WebAssemblyInstrSIMD.td - Put definition and use of patterns together - Add newlines here and there Reviewers: tlively Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D53045 llvm-svn: 344086
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Rong Xu authored
Fix the memory issue exposed by sanitizer. llvm-svn: 344085
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Cameron McInally authored
https://reviews.llvm.org/D52934 llvm-svn: 344084
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Rui Ueyama authored
Previously, we cast a pointer to Elf{32,64}_Chdr like this auto *Hdr = reinterpret_cast<const ELF64_Chdr>(Ptr); and read from its members like this read32(&Hdr->ch_size); I was thinking that this does not violate alignment requirement, since &Hdr->ch_size doesn't really access memory, but seems like it is a violation in terms of C++ spec (?) In this patch, I use a different struct that allows unaligned access. llvm-svn: 344083 -
Sanjay Patel authored
icmp ne (and X, 1), 0 --> trunc X to N x i1 Ideally, we'd do the same for scalars, but there will likely be regressions unless we add more trunc folds as we're doing here for vectors. The motivating vector case is from PR37549: https://bugs.llvm.org/show_bug.cgi?id=37549 define <4 x float> @bitwise_select(<4 x float> %x, <4 x float> %y, <4 x float> %z, <4 x float> %w) { %c = fcmp ole <4 x float> %x, %y %s = sext <4 x i1> %c to <4 x i32> %s1 = shufflevector <4 x i32> %s, <4 x i32> undef, <4 x i32> <i32 0, i32 0, i32 1, i32 1> %s2 = shufflevector <4 x i32> %s, <4 x i32> undef, <4 x i32> <i32 2, i32 2, i32 3, i32 3> %cond = or <4 x i32> %s1, %s2 %condtr = trunc <4 x i32> %cond to <4 x i1> %r = select <4 x i1> %condtr, <4 x float> %z, <4 x float> %w ret <4 x float> %r } Here's a sampling of the vector codegen for that case using mask+icmp (current behavior) vs. trunc (with this patch): AVX before: vcmpleps %xmm1, %xmm0, %xmm0 vpermilps $80, %xmm0, %xmm1 ## xmm1 = xmm0[0,0,1,1] vpermilps $250, %xmm0, %xmm0 ## xmm0 = xmm0[2,2,3,3] vorps %xmm0, %xmm1, %xmm0 vandps LCPI0_0(%rip), %xmm0, %xmm0 vxorps %xmm1, %xmm1, %xmm1 vpcmpeqd %xmm1, %xmm0, %xmm0 vblendvps %xmm0, %xmm3, %xmm2, %xmm0 AVX after: vcmpleps %xmm1, %xmm0, %xmm0 vpermilps $80, %xmm0, %xmm1 ## xmm1 = xmm0[0,0,1,1] vpermilps $250, %xmm0, %xmm0 ## xmm0 = xmm0[2,2,3,3] vorps %xmm0, %xmm1, %xmm0 vblendvps %xmm0, %xmm2, %xmm3, %xmm0 AVX512f before: vcmpleps %xmm1, %xmm0, %xmm0 vpermilps $80, %xmm0, %xmm1 ## xmm1 = xmm0[0,0,1,1] vpermilps $250, %xmm0, %xmm0 ## xmm0 = xmm0[2,2,3,3] vorps %xmm0, %xmm1, %xmm0 vpbroadcastd LCPI0_0(%rip), %xmm1 ## xmm1 = [1,1,1,1] vptestnmd %zmm1, %zmm0, %k1 vblendmps %zmm3, %zmm2, %zmm0 {%k1} AVX512f after: vcmpleps %xmm1, %xmm0, %xmm0 vpermilps $80, %xmm0, %xmm1 ## xmm1 = xmm0[0,0,1,1] vpermilps $250, %xmm0, %xmm0 ## xmm0 = xmm0[2,2,3,3] vorps %xmm0, %xmm1, %xmm0 vpslld $31, %xmm0, %xmm0 vptestmd %zmm0, %zmm0, %k1 vblendmps %zmm2, %zmm3, %zmm0 {%k1} AArch64 before: fcmge v0.4s, v1.4s, v0.4s zip1 v1.4s, v0.4s, v0.4s zip2 v0.4s, v0.4s, v0.4s orr v0.16b, v1.16b, v0.16b movi v1.4s, #1 and v0.16b, v0.16b, v1.16b cmeq v0.4s, v0.4s, #0 bsl v0.16b, v3.16b, v2.16b AArch64 after: fcmge v0.4s, v1.4s, v0.4s zip1 v1.4s, v0.4s, v0.4s zip2 v0.4s, v0.4s, v0.4s orr v0.16b, v1.16b, v0.16b bsl v0.16b, v2.16b, v3.16b PowerPC-le before: xvcmpgesp 34, 35, 34 vspltisw 0, 1 vmrglw 3, 2, 2 vmrghw 2, 2, 2 xxlor 0, 35, 34 xxlxor 35, 35, 35 xxland 34, 0, 32 vcmpequw 2, 2, 3 xxsel 34, 36, 37, 34 PowerPC-le after: xvcmpgesp 34, 35, 34 vmrglw 3, 2, 2 vmrghw 2, 2, 2 xxlor 0, 35, 34 xxsel 34, 37, 36, 0 Differential Revision: https://reviews.llvm.org/D52747 llvm-svn: 344082
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Zachary Turner authored
When we're on the last bucket the computation is tricky. We were failing when the last bucket contained multiple matches. Added a new test for this. llvm-svn: 344081
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Jake Ehrlich authored
-S should be an alias for --strip-all not --strip-all-gnu llvm-svn: 344080
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Adrian Prantl authored
rdar://problem/45132695 llvm-svn: 344079
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Lang Hames authored
rather than require them to have been promoted before being passed in. Dropping this precondition is better for layer composition (CompileOnDemandLayer was the only one that placed pre-conditions on the modules that could be added). It also means that the promoted private symbols do not show up in the target JITDylib's symbol table. Instead, they are confined to the hidden implementation dylib that contains the actual definitions. For the 403.gcc testcase this cut down the public symbol table size from ~15,000 symbols to ~4000, substantially reducing symbol dependence tracking costs. llvm-svn: 344078
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Nemanja Ivanovic authored
This is the PPC-specific non-controversial part of https://reviews.llvm.org/D44548 that simply enables this combine for PPC since PPC has these instructions. This commit will allow the target-independent portion to be truly target independent. llvm-svn: 344077
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Rui Ueyama authored
llvm-svn: 344076
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Rui Ueyama authored
`SymbolTable` is a singleton class and is a global variable for the unique instance, so we can always refer the symtab by `Symtab->`. However, we don't need to use the global varaible from member functions of SymbolTable class. llvm-svn: 344075
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Rui Ueyama authored
llvm-svn: 344074
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Matt Davis authored
Summary: This is just a minor cleanup to the allocateOneNode interface. The formals are no-longer used, so I just removed them. Reviewers: davidxl, void Reviewed By: davidxl Subscribers: dberris, llvm-commits Differential Revision: https://reviews.llvm.org/D52509 llvm-svn: 344073
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Rui Ueyama authored
Sometimes, code that is a bit longer but doesn't use template is easier to understand than code that uses template. llvm-svn: 344072
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Craig Topper authored
[X86] When lowering unsigned v2i64 setcc without SSE42, flip the sign bits in the v2i64 type then bitcast to v4i32. This may give slightly better opportunities for DAG combine to simplify with the operations before the setcc. It also matches the type the xors will eventually be promoted to anyway so it saves a legalization step. Almost all of the test changes are because our constant pool entry is now v2i64 instead of v4i32 on 64-bit targets. On 32-bit targets getConstant should be emitting a v4i32 build_vector and a v4i32->v2i64 bitcast. There are a couple test cases where it appears we now combine a bitwise not with one of these xors which caused a new constant vector to be generated. This prevented a constant pool entry from being shared. But if that's an issue we're concerned about, it seems we need to address it another way that just relying a bitcast to hide it. This came about from experiments I've been trying with pushing the promotion of and/or/xor to vXi64 later than LegalizeVectorOps where it is today. We run LegalizeVectorOps in a bottom up order. So the and/or/xor are promoted before their users are legalized. The bitcasts added for the promotion act as a barrier to computeKnownBits if we try to use it during vector legalization of a later operation. So by moving the promotion out we can hopefully get better results from computeKnownBits/computeNumSignBits like in LowerTruncate on AVX512. I've also looked at running LegalizeVectorOps in a top down order like LegalizeDAG, but thats showing some other issues. llvm-svn: 344071
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Richard Smith authored
conflicting values for a non-type pack. llvm-svn: 344070
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Sam Clegg authored
In the case of soft-fp (e.g. fp128 under wasm) the result of getTypeLegalizationCost() can be an integer type even if the input is floating point (See LegalizeTypeAction::TypeSoftenFloat). Before calling isFabsFree() (which asserts if given a non-fp type) we need to check that that result is fp. This is safe since in fabs is certainly not free in the soft-fp case. Fixes PR39168 Differential Revision: https://reviews.llvm.org/D52899 llvm-svn: 344069
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Wolfgang Pieb authored
Reviewer: dblaikie Differential Revision: https://reviews.llvm.org/D52444 llvm-svn: 344068
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Sanjay Patel authored
llvm-svn: 344067
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Zachary Turner authored
I removed this output from the dumper because it was non-portable, but I didn't update the test which checked the output. llvm-svn: 344066
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Nico Weber authored
llvm-svn: 344065
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