1. Mar 28, 2023
  2. Mar 27, 2023
    • Balázs Kéri's avatar
      [clang][ASTImporter] Import typedefs to distinct records as distinct nodes. · 1a35893d
      Balázs Kéri authored
      When a typedef node is imported, ASTImporter should not find an existing similar
      typedef node for it that comes from different context (translation unit or scope).
      This should avoid a situation where an existing typedef declaration is returned
      at import of a typedef, but the underlying type was already imported as a new
      type object.
      
      Reviewed By: vabridgers
      
      Differential Revision: https://reviews.llvm.org/D145479
      1a35893d
    • Simon Pilgrim's avatar
      [X86] Move combineVectorSizedSetCCEquality above MatchVectorAllZeroTest. NFC. · 0f76fb90
      Simon Pilgrim authored
      The plan is to merge most of the functionality of both of these into a single 'match vector sized data' function.
      0f76fb90
    • Wael Yehia's avatar
      [AIX][Driver] Implement -mxcoff-build-id option · da92f2fb
      Wael Yehia authored
      The -mxcoff-build-id=0xHEXSTRING option is an alternative to the
      --build-id=0xHEXSTRING linker option that is not currently available in
      the AIX linker.
      
      If HEXSTRING is an odd number of hex digits then a '0' character is prepended.
      The characters ':' and '-' are not allowed (unlike the GNU linker option).
      The given build-id will be saved in the string table of the loader section.
      
      A subsequent commit will teach the profile runtime to read and use the embedded id.
      
      Reviewed By: daltenty, qiongsiwu1, stephenpeckham
      
      Differential Revision: https://reviews.llvm.org/D146431
      da92f2fb
    • Ties Stuij's avatar
      [llvm-exegesis] if lit can't find llvm-exegesis, fail gracefully · 88383f18
      Ties Stuij authored
      currently in can_use_perfcounters() in
      llvm/test/tools/llvm-exegesis/lit.local.cfg, we check if we can execute
      llvm-exegesis. But we don't check if we did actually find llvm-exegesis. If we
      didn't, lit.util.which() will return None, and we try to execute that.
      
      Reviewed By: courbet
      
      Differential Revision: https://reviews.llvm.org/D146964
      88383f18
    • Alex Zinenko's avatar
      [mlir] FuncToLLVM: fail gracefully in bare pointer multi-result covnersion · 5f342596
      Alex Zinenko authored
      When type conversion fails, return pattern failure instead of crashing.
      
      Closes #61717.
      5f342596
    • Jakub Kuderski's avatar
      [ADT] Work around MSVC bug affecting `get(enumerator_result)` · 95abf860
      Jakub Kuderski authored
      This happened on a small number of MSVC releases (19.31.31xxx, Visual Studio 2022 17.1.x), and worked fine on everything else.
      
      The issue seemed to be related to return type deduction on a function with and `if constexpr`; the compiler got confused and deduced different function return type from the type of the return statement.
      
      The workaround is to split `get` into two functions using `enable_if`.
      
      Reviewed By: dstuttard
      
      Differential Revision: https://reviews.llvm.org/D146893
      95abf860
    • Viktoriia Bakalova's avatar
    • Alexander Hederstaf's avatar
      [clang-format] Improve QualifierAlignment · cd7ab4b5
      Alexander Hederstaf authored
      Qualifiers were not moved for non-pointer non-simple types.
      Add additional support for many special cases such as templates,
      requires clauses, long qualified names.
      
      Fixes https://github.com/llvm/llvm-project/issues/57154 and
      https://github.com/llvm/llvm-project/issues/60898
      
      Reviewed By: MyDeveloperDay, HazardyKnusperkeks
      
      Differential Revision: https://reviews.llvm.org/D144709
      cd7ab4b5
    • Job Noorman's avatar
      [RISCV] Remove isCall instruction flag from JAL/JALR · 1d1b3c49
      Job Noorman authored
      As far as I can tell, the instruction flags set in the various
      RISCVInstrInfo*.td files are always under-approximations. That is,
      something like isTerminator will only be set for opcodes that are
      *always* terminators.
      
      The exception seems to be isCall; this is set for JAL/JALR while these
      instruction are not always calls. This patch proposes to remove isCall
      from JAL/JALR for consistency.
      
      A follow-up patch will add more detailed analysis of some instruction
      properties based on MCInstrAnalysis.
      
      Reviewed By: asb, craig.topper
      
      Differential Revision: https://reviews.llvm.org/D146437
      1d1b3c49
    • David Sherwood's avatar
      [SVE][LoopVectorize] Add option to disable tail-folding for reverse loops · 636efd2e
      David Sherwood authored
      If we use tail-folding for reverse loops that contain loads
      and stores then we will need to reverse the loop predicate.
      This patch adds a new 'reverse' sve-tail-folding option and
      ensures they are not considered 'simple'.
      
      I did this by adding a function called
      containsDecreasingPointers to AArch64TargetTransformInfo.cpp
      that searches all instructions in the loop for loads or
      stores with negative strides.
      
      Differential Revision: https://reviews.llvm.org/D146128
      636efd2e
    • LLVM GN Syncbot's avatar
      [gn build] Port 42058eea · c502d480
      LLVM GN Syncbot authored
      c502d480
    • Aaron Ballman's avatar
      Document the Clang policies on claiming support for a feature · ce548b61
      Aaron Ballman authored
      We do not currently have this written down anywhere, and as a result,
      we're sometimes inconsistent with how we handle feature test macros and
      the feature status pages. This is an attempt to document what I
      understand our existing policies to be instead of defining a new policy.
      
      Note, this is being added to the Clang internals manual because we
      don't have a separate document for Clang developer policies. At some
      point, I think we may want a standalone document for that, and this
      content can be moved there at that time.
      
      Differential Revision: https://reviews.llvm.org/D146420
      ce548b61
    • Alexey Lapshin's avatar
      [reland][ADT] add ConcurrentHashtable class. · 42058eea
      Alexey Lapshin authored
      ConcurrentHashTable - is a resizeable concurrent hashtable.
      The range of resizings is limited up to x2^31.
      The hashtable allows only concurrent insertions.
      
      Concurrent hashtable is necessary for the D96035 patch.
      
      Reviewed By: JDevlieghere
      
      Differential Revision: https://reviews.llvm.org/D132455
      42058eea
    • Markus Böck's avatar
      [mlir][AsmPrinter] Fallback to using qualified printer if unqualified output is empty · 70074c11
      Markus Böck authored
      The current behaviour of always writing the unqualified form of an attribute or type is problematic for any type or attribute that might output an empty string, making it impossible to parse and therefore roundtrip. This is commonly the case for any types or attributes with optional parameters. One would have to currently woarkaround the issue by either changing ones syntax to not be completetly empty or by explicitly using `qualified` in ALL ops using that type or attribute.
      
      This patch fixes that issue by simply checking whether anything was written to the output. In the case there wasn't, it simply falls back to using the normal printer with the dialect prefix. This also makes the default of unqualified printing always correct and safe. The implementation could theoretically still be tricked if the user were to print just a space or similar. I'd argue this'd be user error and not worth handling.
      
      Fixes https://github.com/llvm/llvm-project/issues/61701
      
      Differential Revision: https://reviews.llvm.org/D146944
      70074c11
    • Joseph Huber's avatar
      [libc] Enable integration tests targeting NVIDIA GPUs · b26970ec
      Joseph Huber authored
      This patch adds the necessary build infrastructure to build and run the
      integration tests on NVIDIA GPUs. The NVIDIA `nvlink` linker utility is
      what is ultimately used to combine these files into a single executable
      image. Unfortunately, their tool does not support static libraries. So
      we need to link with every object directly instead. This could be solved
      by impelementing a "wrapper" utility around `nvlink` like we used to use
      for OpenMP. But for now this should be sufficient.
      
      Reviewed By: sivachandra
      
      Differential Revision: https://reviews.llvm.org/D146861
      b26970ec
    • Michael Maitland's avatar
      [RISCV] Remove UpperBound from SchedMxList and create WorstCaseBehavior records · 2e2093aa
      Michael Maitland authored
      Prior to this patch, UpperBound refered to the largest LMUL
      supported. Instructions used UpperBound to assign the worst
      case behaviour to records, since Instructions are not LMUL
      specific. This forced the largest LMUL to have the worst case
      behavior, even if that wasn't true for a subtarget.
      
      Now that SchedWrites, SchedReads, WriteRes, and ReadAdvances
      are created for (name, LMUL) pairs and (name, LMUL, SEW)
      tuples, it becomes even less clear which pair should correspond
      to the worst case behavior. Additionally, it no longer makes sense
      for the UpperBound to belong to LMUL list and not to the SEW list.
      
      Instead of creating a special UpperBound LMUL and an UpperBound
      SEW, this patch renames UpperBound to WorstCaseBehavior, removes
      it from the SchedMxList, and defines a WorstCaseBehavior SchedWrite,
      SchedRead, WriteRes, and ReadAdvance for each name.
      
      This gives subtargets the ability to describe the worst case behavior
      of a record without forcing it to be the largest LMUL or the smallest
      SEW.
      
      Differential Revision: https://reviews.llvm.org/D146855
      2e2093aa
    • Jay Foad's avatar
      ffab44bd
    • Michael Maitland's avatar
    • Amy Kwan's avatar
      [PowerPC][GISel] Add initial GlobalISel support for vector functions. · 3508f123
      Amy Kwan authored
      This patch adds the initial support for vector functions and register banks
      within GlobalISel. With this patch, we are able to support simple functions that
      return vectors, and also functions that perform simple operations.
      
      This patch also:
      - Legalizes vector types for G_AND, G_OR, G_XOR, G_ADD, G_SUB, G_BITCAST, G_FADD, G_FSUB
      - Introduce initial support for bitcasting (that will need to be extended upon)
      - Add various different test cases to for test vector support within GlobalISel
      
      Differential Revision: https://reviews.llvm.org/D137785
      3508f123
    • Amy Kwan's avatar
      [PowerPC] Implement 64-bit ELFv2 Calling Convention in TableGen (for... · 6126356d
      Amy Kwan authored
      [PowerPC] Implement 64-bit ELFv2 Calling Convention in TableGen (for integers/floats/vectors in registers)
      
      This patch partially implements the parameter passing rules outlined in the
      ELFv2 ABI within TableGen. Specifically, it implements the parameter assignment
      of integers, floats, and vectors within registers - where the GPR numbering will
      be "skipped" depending on the ordering of floats and vectors that appear within
      a parameter list.
      
      As we begin to adopt GlobalISel to the PowerPC backend, there is a need for a
      TableGen definition that encapsulates the ELFv2 parameter passing rules. Thus,
      this patch also changes the default calling convention that is returned within
      the ccAssignFnForCall() function used in our GlobalISel implementation, and also
      adds some additional testing of the calling convention that is implemented.
      
      Future patches that build on top of this initial TableGen definition will aim to
      add more of the ABI complexities, including support for additional types and
      also in-memory arguments.
      
      Differential Revision: https://reviews.llvm.org/D137504
      6126356d
    • Benjamin Kramer's avatar
      [JITLink] Drop using namespace · 03df67e7
      Benjamin Kramer authored
      I don't think these are holding their weight and cause nasty to debug
      compiler issues with some versions of MSVC as seen in
      https://reviews.llvm.org/D144083#4220866
      
      Just qualify the types with the full name.
      03df67e7
    • Michael Maitland's avatar
      [RISCV] Remove UpperBound from SchedMxList and create WorstCaseBehavior records · 74c0bd24
      Michael Maitland authored
      Prior to this patch, UpperBound refered to the largest LMUL
      supported. Instructions used UpperBound to assign the worst
      case behaviour to records, since Instructions are not LMUL
      specific. This forced the largest LMUL to have the worst case
      behavior, even if that wasn't true for a subtarget.
      
      Now that SchedWrites, SchedReads, WriteRes, and ReadAdvances
      are created for (name, LMUL) pairs and (name, LMUL, SEW)
      tuples, it becomes even less clear which pair should correspond
      to the worst case behavior. Additionally, it no longer makes sense
      for the UpperBound to belong to LMUL list and not to the SEW list.
      
      Instead of creating a special UpperBound LMUL and an UpperBound
      SEW, this patch renames UpperBound to WorstCaseBehavior, removes
      it from the SchedMxList, and defines a WorstCaseBehavior SchedWrite,
      SchedRead, WriteRes, and ReadAdvance for each name.
      
      This gives subtargets the ability to describe the worst case behavior
      of a record without forcing it to be the largest LMUL or the smallest
      SEW.
      
      Differential Revision: https://reviews.llvm.org/D146855
      74c0bd24
    • Mitch Phillips's avatar
      Revert "[C++20][Modules] Introduce an implementation module." · 074f6fd6
      Mitch Phillips authored
      This reverts commit c6e98237.
      
      Reason: Broke the ASan buildbots, see https://reviews.llvm.org/D126959
      (the original phabricator review) for more info.
      074f6fd6