1. Nov 30, 2021
    • gysit's avatar
      [mlir][linalg] Add decompose to CodegenStrategy. · c8f2139e
      gysit authored
      Add the decompose patterns that lower higher dimensional convolutions to lower dimensional ones to CodegenStrategy and use CodegenStrategy to test the decompose patterns. Additionally, remove the assertion that checks the anchor op name is set in the CodegenStrategyTest pass. Removing the assertion allows us to simplify the pipelines used in the interchange and decompose tests.
      
      Depends On D114797
      
      Reviewed By: nicolasvasilache
      
      Differential Revision: https://reviews.llvm.org/D114798
      c8f2139e
    • gysit's avatar
      [mlir][linalg] Adapt the decompose patterns to use a filter (NFC). · 98dbcff1
      gysit authored
      The revision updates the convolution decomposition patterns to take a linalg transformation filter. The transformation filter in a later revision allows use the patterns from CodegenStrategy.
      
      Depends On D114690
      
      Reviewed By: nicolasvasilache
      
      Differential Revision: https://reviews.llvm.org/D114797
      98dbcff1
    • James Farrell's avatar
      Use VersionTuple for parsing versions in Triple. This makes it possible to... · 1e828646
      James Farrell authored
      Use VersionTuple for parsing versions in Triple. This makes it possible to distinguish between "16" and "16.0" after parsing, which previously was not possible.
      
      See also https://github.com/android/ndk/issues/1455.
      
      Differential Revision: https://reviews.llvm.org/D114163
      1e828646
    • Florian Hahn's avatar
      [DSE] Use optimized access if available for redundant store elimination. · c9ad3562
      Florian Hahn authored
      Using the optimized access enables additional optimizations in cases
      where the defining access is a non-aliasing store.
      
      Alternatively we could also walk upwards and skip non-aliasing defs
      here, but my experiments so far showed that this will noticeably
      increase compile-time for little extra gain compared to just using the
      optimized access.
      
      Improvements of dse.NumRedundantStores on MultiSource/CINT2006/CPF2006
      on X86 with -O3:
      
           test-suite...-typeset/consumer-typeset.test     1.00                  76.00              7500.0%
           test-suite.../Benchmarks/Bullet/bullet.test     3.00                  12.00              300.0%
           test-suite...006/453.povray/453.povray.test     3.00                   6.00              100.0%
           test-suite...telecomm-gsm/telecomm-gsm.test     1.00                   2.00              100.0%
           test-suite...ediabench/gsm/toast/toast.test     1.00                   2.00              100.0%
           test-suite...marks/7zip/7zip-benchmark.test     1.00                   2.00              100.0%
           test-suite...ications/JM/lencod/lencod.test     7.00                  10.00              42.9%
           test-suite...6/464.h264ref/464.h264ref.test     6.00                   8.00              33.3%
           test-suite...ications/JM/ldecod/ldecod.test     6.00                   7.00              16.7%
           test-suite...006/447.dealII/447.dealII.test    33.00                  33.00               0.0%
           test-suite...6/471.omnetpp/471.omnetpp.test    NaN                     1.00               nan%
           test-suite...006/450.soplex/450.soplex.test    NaN                     2.00               nan%
           test-suite.../CINT2006/403.gcc/403.gcc.test    NaN                     7.00               nan%
           test-suite...lications/ClamAV/clamscan.test    NaN                     1.00               nan%
           test-suite...CI_Purple/SMG2000/smg2000.test    NaN                     3.00               nan%
      
      Follow-up to D111727.
      
      Reviewed By: nikic
      
      Differential Revision: https://reviews.llvm.org/D112315
      c9ad3562
    • gysit's avatar
      [mlir][linalg] Support the empty anchor op string when padding. · 316e627c
      gysit authored
      Add support for an empty anchor op string in vectorization. An empty anchor op string is useful after fusion when there are multiple different operations to vectorize.
      
      Depends On D114689
      
      Reviewed By: nicolasvasilache
      
      Differential Revision: https://reviews.llvm.org/D114690
      316e627c
    • Yitzhak Mandelbaum's avatar
      [clang][dataflow] Fix broken build in ClangStaticAnalyzer · 3e32f827
      Yitzhak Mandelbaum authored
      Adds a missing virtual destructor.
      3e32f827
    • gysit's avatar
      [mlir][linalg] Use top down traversal for padding. · 7f7103cd
      gysit authored
      Pad the operation using a top down traversal. The top down traversal unlocks folding opportunities and dim op canonicalizations due to the introduced extract slice operation after the padded operation.
      
      Depends On D114585
      
      Reviewed By: nicolasvasilache
      
      Differential Revision: https://reviews.llvm.org/D114689
      7f7103cd
    • David Green's avatar
      [DAG] Create fptosi.sat from clamped fptosi · 9e8a71ca
      David Green authored
      This adds a fold in DAGCombine to create fptosi_sat from sequences for
      smin(smax(fptosi(x))) nodes, where the min/max saturate the output of
      the fp convert to a specific bitwidth (say INT_MIN and INT_MAX). Because
      it is dealing with smin(/smax) in DAG they may currently be ISD::SMIN,
      ISD::SETCC/ISD::SELECT, ISD::VSELECT or ISD::SELECT_CC nodes which need
      to be handled similarly.
      
      A shouldConvertFpToSat method was added to control when converting may
      be profitable. The original fptosi will have a less strict semantics
      than the fptosisat, with less values that need to produce defined
      behaviour.
      
      This especially helps on ARM/AArch64 where the vcvt instructions
      naturally saturate the result.
      
      Differential Revision: https://reviews.llvm.org/D111976
      9e8a71ca
    • gysit's avatar
      [mlir][linalg] Fix windows build issue in hoist padding. · 1ae7342a
      gysit authored
      Iterating backwardSlice and removing elements at the same time can fail on windows for specific build configurations (the code was introduced in https://reviews.llvm.org/D114420). This revision introduces a second vector to collect all operations and removes them after finishing the reverse iteration.
      
      Reviewed By: hpmorgan
      
      Differential Revision: https://reviews.llvm.org/D114775
      1ae7342a
    • Joseph Huber's avatar
      [OpenMP] Add RTL function to externalization RAII · 7986a5f2
      Joseph Huber authored
      This patch adds the `__kmpc_get_warp_size` OpenMP RTL function to the
      externalization RAII struct. This was getting optimized out and then
      being replaced with an undefined value once added back in, causing bugs
      for complex reductions.
      
      Reviewed By: jdoerfert
      
      Differential Revision: https://reviews.llvm.org/D114802
      7986a5f2
    • gysit's avatar
      [mlir][linalg] Run CSE after every CodegenStrategy transformation. · 914e72d4
      gysit authored
      Add CSE after every transformation. Transformations such as tiling introduce redundant computation, for example, one AffineMinOp for every operand dimension pair. Follow up transformations such as Padding and Hoisting benefit from CSE since comparing slice sizes simplifies to comparing SSA values instead of analyzing affine expressions.
      
      Reviewed By: nicolasvasilache
      
      Differential Revision: https://reviews.llvm.org/D114585
      914e72d4
    • Vy Nguyen's avatar
      74cbd710
    • Valentin Clement's avatar
      [fir] Add fir reduction builder · cf3422d3
      Valentin Clement authored
      
      
      This patch introduces a bunch of builder functions
      to create function calls to runtime reduction functions.
      
      This patch is part of the upstreaming effort from fir-dev branch.
      
      Co-authored-by: default avatarJean Perier <jperier@nvidia.com>
      Co-authored-by: default avatarmleair <leairmark@gmail.com>
      
      Differential Revision: https://reviews.llvm.org/D114460
      
      Reviewed By: awarzynski
      cf3422d3
    • Tobias Burnus's avatar
      [MC][ELF] Fix accepting abbreviated form with Type change · c01c62c7
      Tobias Burnus authored
      Follow up to D92052 and D94072, exposed due to D107707
      
      Many assemblers to permit that only the first .section contains all
      the attributes like '.lds_bss,"w",@nobits' and later section only
      use the name ('.lds_bss') inheriting those attributes from the first
      section.  I turned out that the case that Type changed was missed
      when implementing it - and D107707 make it much more likely to hit
      that issue. That's fixed by this commit.
      
      Reviewed By: MaskRay
      
      Differential Revision: https://reviews.llvm.org/D114717
      c01c62c7
    • Stanislav Gatev's avatar
      [clang][dataflow] Add base types for building dataflow analyses · 6e2aecd7
      Stanislav Gatev authored
      This is part of the implementation of the dataflow analysis framework.
      See "[RFC] A dataflow analysis framework for Clang AST" on cfe-dev.
      
      Reviewed By: ymandel, xazax.hun, gribozavr2
      
      Differential Revision: https://reviews.llvm.org/D114234
      6e2aecd7
    • Hans Wennborg's avatar
      Revert "[DAG] Create fptosi.sat from clamped fptosi" · a87782c3
      Hans Wennborg authored
      It causes builds to fail with this assert:
      
      llvm/include/llvm/ADT/APInt.h:990:
      bool llvm::APInt::operator==(const llvm::APInt &) const:
      Assertion `BitWidth == RHS.BitWidth && "Comparison requires equal bit widths"' failed.
      
      See comment on the code review.
      
      > This adds a fold in DAGCombine to create fptosi_sat from sequences for
      > smin(smax(fptosi(x))) nodes, where the min/max saturate the output of
      > the fp convert to a specific bitwidth (say INT_MIN and INT_MAX). Because
      > it is dealing with smin(/smax) in DAG they may currently be ISD::SMIN,
      > ISD::SETCC/ISD::SELECT, ISD::VSELECT or ISD::SELECT_CC nodes which need
      > to be handled similarly.
      >
      > A shouldConvertFpToSat method was added to control when converting may
      > be profitable. The original fptosi will have a less strict semantics
      > than the fptosisat, with less values that need to produce defined
      > behaviour.
      >
      > This especially helps on ARM/AArch64 where the vcvt instructions
      > naturally saturate the result.
      >
      > Differential Revision: https://reviews.llvm.org/D111976
      
      This reverts commit 52ff3b00.
      a87782c3
    • Mateja Marjanovic's avatar
      Test commit · 0c1b18f0
      Mateja Marjanovic authored
      Change-Id: I1d310a860ed673acdc8177232c91025004b1f3d2
      0c1b18f0
    • Florian Hahn's avatar
      [DSE] Add memset_chk tests. · 41d59a36
      Florian Hahn authored
      41d59a36
    • Florian Hahn's avatar
      [BuildLibCalls] Add memset_chk test. · 6f4dd1b2
      Florian Hahn authored
      6f4dd1b2
    • Jeremy Morse's avatar
      [DebugInfo] Turn instruction referencing on by default for x86 · 3c045070
      Jeremy Morse authored
      This patch is designed to be reverted -- it activates a reasonably large
      block of new-ish code, so some turbulence is likely.
      
      Instruction referencing is best summarised, and it being on-by-default,
      is discussed here:
      
          https://lists.llvm.org/pipermail/llvm-dev/2021-November/153653.html
      
      Differential Revision: https://reviews.llvm.org/D114631
      3c045070
    • Simon Pilgrim's avatar
      [X86] Add mulh test coverage for extension to illegal type · 9a86eb56
      Simon Pilgrim authored
      Part of D113371 - add test coverage for case where we're truncating from an illegal type
      9a86eb56
    • Pavel Labath's avatar
      [lldb] Introduce PlatformQemuUser · 14086849
      Pavel Labath authored
      This adds a new platform class, whose job is to enable running
      (debugging) executables under qemu.
      
      (For general information about qemu, I recommend reading the RFC thread
      on lldb-dev
      <https://lists.llvm.org/pipermail/lldb-dev/2021-October/017106.html>.)
      
      This initial patch implements the necessary boilerplate as well as the
      minimal amount of functionality needed to actually be able to do
      something useful (which, in this case means debugging a fully statically
      linked executable).
      
      The knobs necessary to emulate dynamically linked programs, as well as
      to control other aspects of qemu operation (the emulated cpu, for
      instance) will be added in subsequent patches. Same goes for the ability
      to automatically bind to the executables of the emulated architecture.
      
      Currently only two settings are available:
      - architecture: the architecture that we should emulate
      - emulator-path: the path to the emulator
      
      Even though this patch is relatively small, it doesn't lack subtleties
      that are worth calling out explicitly:
      - named sockets: qemu supports tcp and unix socket connections, both of
        them in the "forward connect" mode (qemu listening, lldb connecting).
        Forward TCP connections are impossible to realise in a race-free way.
        This is the reason why I chose unix sockets as they have larger, more
        structured names, which can guarantee that there are no collisions
        between concurrent connection attempts.
      - the above means that this code will not work on windows. I don't think
        that's an issue since user mode qemu does not support windows anyway.
      - Right now, I am leaving the code enabled for windows, but maybe it
        would be better to disable it (otoh, disabling it means windows
        developers can't check they don't break it)
      - qemu-user also does not support macOS, so one could contemplate
        disabling it there too. However, macOS does support named sockets, so
        one can even run the (mock) qemu tests there, and I think it'd be a
        shame to lose that.
      
      Differential Revision: https://reviews.llvm.org/D114509
      14086849
    • Pavel Labath's avatar
    • Nico Weber's avatar
      [gn build] (semimanually) port 25a7e4b9 · ee0c75eb
      Nico Weber authored
      ee0c75eb
    • Valentin Clement's avatar
      [fir] Add array value copy pass · 47f75930
      Valentin Clement authored
      This patch upstream the array value copy pass.
      
      Transform the set of array value primitives to a memory-based array
      representation.
      
      The Ops `array_load`, `array_store`, `array_fetch`, and `array_update` are
      used to manage abstract aggregate array values. A simple analysis is done
      to determine if there are potential dependences between these operations.
      If not, these array operations can be lowered to work directly on the memory
      representation. If there is a potential conflict, a temporary is created
      along with appropriate copy-in/copy-out operations. Here, a more refined
      analysis might be deployed, such as using the affine framework.
      
      This pass is required before code gen to the LLVM IR dialect.
      
      This patch is part of the upstreaming effort from fir-dev branch. The
      pass is bringing quite a lot of file with it.
      
      Reviewed By: kiranchandramohan, schweitz
      
      Differential Revision: https://reviews.llvm.org/D111337
      
      
      
      Co-authored-by: default avatarJean Perier <jperier@nvidia.com>
      Co-authored-by: default avatarEric Schweitz <eschweitz@nvidia.com>
      Co-authored-by: default avatarV Donaldson <vdonaldson@nvidia.com>
      47f75930
    • Jeremy Morse's avatar
      [DebugInfo][InstrRef] Pre-land on-by-default-for-x86 changes · 651122fc
      Jeremy Morse authored
      Over in D114631 and [0] there's a plan for turning instruction referencing
      on by default for x86. This patch adds / removes all the relevant bits of
      code, with the aim that the final patch is extremely small, for an easy
      revert. It should just be a condition in CommandFlags.cpp and removing the
      XFail on instr-ref-flag.ll.
      
      [0] https://lists.llvm.org/pipermail/llvm-dev/2021-November/153653.html
      651122fc
    • Alexander Belyaev's avatar
      97db6408
    • Alexander Belyaev's avatar
      f910aa91
    • Jeremy Morse's avatar
      [DebugInfo][InstrRef][X86] Instrument expanded DYN_ALLOCAs · 7093c810
      Jeremy Morse authored
      If we have a DYN_ALLOCA_* instruction, it will eventually be expanded to a
      stack probe and subtract-from-SP. Add debug-info instrumentation to
      X86FrameLowering::emitStackProbe so that it can redirect debug-info for the
      DYN_ALLOCA to the lowered stack probe. In practice, this means putting an
      instruction number label either the call instruction to _chkstk for win32,
      or more commonly on the subtract from SP instruction. The two tests added
      cover both of these cases.
      
      Differential Revision: https://reviews.llvm.org/D114452
      7093c810
    • Abinav Puthan Purayil's avatar
    • Jeremy Morse's avatar
      [DebugInfo][InstrRef] Avoid dropping fragment info during PHI elimination · 8dda516b
      Jeremy Morse authored
      InstrRefBasedLDV used to crash on the added test -- the exit block is not
      in scope for the variable being propagated, but is still considered because
      it contains an assignment. The failure-mode was vlocJoin ignoring
      assign-only blocks and not updating DIExpressions, but pickVPHILoc would
      still find a variable location for it. That led to DBG_VALUEs created with
      the wrong fragment information.
      
      Fix this by removing a filter inherited from VarLocBasedLDV: vlocJoin will
      now consider assign-only blocks and will update their expressions.
      
      Differential Revision: https://reviews.llvm.org/D114727
      8dda516b
    • David Green's avatar
      [DAG] Create fptosi.sat from clamped fptosi · 52ff3b00
      David Green authored
      This adds a fold in DAGCombine to create fptosi_sat from sequences for
      smin(smax(fptosi(x))) nodes, where the min/max saturate the output of
      the fp convert to a specific bitwidth (say INT_MIN and INT_MAX). Because
      it is dealing with smin(/smax) in DAG they may currently be ISD::SMIN,
      ISD::SETCC/ISD::SELECT, ISD::VSELECT or ISD::SELECT_CC nodes which need
      to be handled similarly.
      
      A shouldConvertFpToSat method was added to control when converting may
      be profitable. The original fptosi will have a less strict semantics
      than the fptosisat, with less values that need to produce defined
      behaviour.
      
      This especially helps on ARM/AArch64 where the vcvt instructions
      naturally saturate the result.
      
      Differential Revision: https://reviews.llvm.org/D111976
      52ff3b00
    • Louis Dionne's avatar
      [libc++][ABI BREAK] Do not use the C++03 emulation for std::nullptr_t by default · a34f2468
      Louis Dionne authored
      We only support Clangs that implement nullptr as an extension in C++03 mode,
      and we don't support GCC in C++03 mode. Hence, this patch disables the
      use of the std::nullptr_t emulation in C++03 mode by default. Doing that
      is technically an ABI break since it changes the mangling for std::nullptr_t.
      However:
      
      (1) The only affected users are those compiling in C++03 mode that have
          std::nullptr_t as part of their ABI, which should be reasonably rare.
      
      (2) Those users already have a lingering problem in that their code will
          be incompatible in C++03 and C++11 modes because of that very ABI break.
          Hence, the only users that could really be inconvenienced about this
          change is those that planned on compiling in C++03 mode forever - for
          other users, we're just breaking them now instead of letting them break
          themselves later on when they try to upgrade to C++11.
      
      (3) The ABI break will cause a linker error since ...
      a34f2468
    • Guillaume Chatelet's avatar
      [libc] Add a reasonably optimized version for bcmp · af059dfe
      Guillaume Chatelet authored
      This is based on current memcmp implementation.
      
      Differential Revision: https://reviews.llvm.org/D114432
      af059dfe
    • Guillaume Chatelet's avatar
      [libc] Add memmove benchmarks · de21f346
      Guillaume Chatelet authored
      This patch enables the benchmarking of `memmove`.
      Ideally, this should be submitted before D114637.
      
      Differential Revision: https://reviews.llvm.org/D114694
      de21f346
    • Jeremy Morse's avatar
      [DebugInfo][InstrRef] "final final" test cleanups for x86 tests · a48e0503
      Jeremy Morse authored
      Two "totally definitely the last ones" instruction referencing test
      updates:
      
       * fp-stack.ll: this test targets i686, and so it won't be getting
         instruction referencing, or at least not right now,
       * X86/live-debug-values.ll: instruction referencing will produce entry
         values in this test, add check lines to account for this. It's not clear
         what the test is supposed to be testing anyway, but the entry values
         appear to be correct.
      
      Differential Revision: https://reviews.llvm.org/D114626
      a48e0503
    • Florian Hahn's avatar
      [LV] Move code from widenSelectInstruction to VPWidenSelectRecipe. (NFC) · dab776dd
      Florian Hahn authored
      The code in widenSelectInstruction has already been transitioned
      to only rely on information provided by VPWidenSelectRecipe directly.
      
      Moving the code directly to VPWidenSelectRecipe::execute completes
      the transition for the recipe.
      
      It provides the following advantages:
      
      1. Less indirection, easier to see what's going on.
      2. Removes accesses to fields of ILV.
      
      2) in particular ensures that no dependencies on
      fields in ILV for vector code generation are re-introduced.
      
      Reviewed By: Ayal
      
      Differential Revision: https://reviews.llvm.org/D114323
      dab776dd
    • Gabor Marton's avatar
      [Analyzer][Core] Make SValBuilder to better simplify svals with 3 symbols in the tree · 0a17896f
      Gabor Marton authored
      Add the capability to simplify more complex constraints where there are 3
      symbols in the tree. In this change I extend simplifySVal to query constraints
      of children sub-symbols in a symbol tree. (The constraint for the parent is
      asked in getKnownValue.)
      
      Differential Revision: https://reviews.llvm.org/D103317
      0a17896f
    • Gabor Marton's avatar
      [Analyzer][solver] Do not remove the simplified symbol from the eq class · f02c5f34
      Gabor Marton authored
      Currently, during symbol simplification we remove the original member symbol
      from the equivalence class (`ClassMembers` trait). However, we keep the
      reverse link (`ClassMap` trait), in order to be able the query the
      related constraints even for the old member. This asymmetry can lead to
      a problem when we merge equivalence classes:
      ```
      ClassA: [a, b]   // ClassMembers trait,
      a->a, b->a       // ClassMap trait, a is the representative symbol
      ```
      Now lets delete `a`:
      ```
      ClassA: [b]
      a->a, b->a
      ```
      Let's merge the trivial class `c` into ClassA:
      ```
      ClassA: [c, b]
      c->c, b->c, a->a
      ```
      Now after the merge operation, `c` and `a` are actually in different
      equivalence classes, which is inconsistent.
      
      One solution to this problem is to simply avoid removing the original
      member and this is what this patch does.
      
      Other options I have considered:
      1) Always merge the trivial class into the non-trivial class. This might
         work most of the time, however, will fail if we have to merge two
         non-trivial classes (in that case we no longer can track equivalences
         precisely).
      2) In `removeMember`, update the reverse link as well. This would cease
         the inconsistency, but we'd loose precision since we could not query
         the constraints for the removed member.
      
      Differential Revision: https://reviews.llvm.org/D114619
      f02c5f34
    • Pavel Labath's avatar
      [lldb] Remove 'extern "C"' from the lldb-swig-python interface · 9a14adea
      Pavel Labath authored
      The LLDBSWIGPython functions had (at least) two problems:
      - There wasn't a single source of truth (a header file) for the
        prototypes of these functions. This meant that subtle differences
        in copies of function declarations could go by undetected. And
        not-so-subtle differences would result in strange runtime failures.
      - All of the declarations had to have an extern "C" interface, because
        the function definitions were being placed inside and extert "C" block
        generated by swig.
      
      This patch fixes both problems by moving the function definitions to the
      %header block of the swig files. This block is not surrounded by extern
      "C", and seems more appropriate anyway, as swig docs say it is meant for
      "user-defined support code" (whereas the previous %wrapper code was for
      automatically-generated wrappers).
      
      It also puts the declarations into the SWIGPythonBridge header file
      (which seems to have been created for this purpose), and ensures it is
      included by all code wishing to define or use these functions. This
      means that any differences in the declaration become a compiler error
      instead of a runtime failure.
      
      Differential Revision: https://reviews.llvm.org/D114369
      9a14adea