Fix a bug in detecting unknown ids as mods of known ids that was
preventing certain fusions.

While at this, fix the function signature of `detectAsMod` function to
have output as the last argument.

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D152055

Before serializing, optimizations on llvm were only called on path to
hsaco, and not cubin. Define opt-level for `gpu-to-cubin` pass as well,
and move call to optimize llvm to a common place.

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D151554

Correctly account for the fact that certain targets do not use the generic address space for the implicit VTT argument. This entails adjusting `ItaniumCXXABI::buildStructorSignature`, `ItaniumCXXABI::addImplicitStructorParams` and `ItaniumCXXABI::getImplicitConstructorArgs` to use the target's global variable address space. The associated test is temporarily marked `XFAIL` as additional fixes are needed.

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D150746

Each COFFSection bind MCSection when created. No need to iterate
throught MCAssembler when writeSection.

Reviewed By: skan

Differential Revision: https://reviews.llvm.org/D151793

Change to system assembler to compile assembly files even
-fintegrated-as is specified. We don't have a good Clang as
for now for assembly files on AIX.

Reviewed By: qiucf

Differential Revision: https://reviews.llvm.org/D148490

Previously the SignedVarInt was incorrectly defined. Follow up work
needed for improving Array printing/parsing, but correcting the
definitions for now.

This addresses the issue found by: https://lab.llvm.org/buildbot/#/builders/192/builds/2309

Enables reserving or marking dead in enum list, resulting in skipping in dispatches.

Fix missed review comment from https://reviews.llvm.org/D144820

The comment moved is referring to the --output-asm-syntax flag rather
than the --print-imm-hex flag, but seems to have mistakenly been put
under the definition of that flag due to some misplaced line numbers on
phabricator.

If the value was already known to not be uniform for the previous
(smaller VF), it cannot be uniform for the larger VF.

This slightly reduces compile-time, once uniformity checks are becoming
a bit more expensive due to using SCEV rewriting (D148841).

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D151658

This patch creates skeleton implementation for the DWARFLinkerParallel.
It also integrates DWARFLinkerParallel into dsymutil and llvm-dwarfutil,
so that empty DWARFLinker::link() can be called. To do this new command
line option is added "--linker apple/llvm". Additionally it changes
existing DWARFLinker interfaces/implementations to be compatible:
use Error for error reporting for the DWARFStreamer, make DWARFFile to
owner of referenced resources, other small refactorings.

Differential Revision: https://reviews.llvm.org/D147952

This is the implementation of the first proposal of strict weak ordering checks described in https://discourse.llvm.org/t/rfc-strict-weak-ordering-checks-in-the-debug-libc/70217

This targets the most vulnerable algorithms like std::sort

Reviewed By: philnik, #libc

Differential Revision: https://reviews.llvm.org/D150264

This patch uses castAs instead of getAs which will assert if the type doesn't match in ConvertQualTypeToKind(clang::ASTContext const &, clang::QualType).

Reviewed By: erichkeane

Differential Revision: https://reviews.llvm.org/D151928

This patch uses castAs instead of getAs which will assert if the type doesn't match to resolve dereference issue with nullptr FPT when calling getThisType() in clang::CodeGen::CGDebugInfo::CreateType(clang::MemberPointerType const *, llvm::DIFile *).

Reviewed By: erichkeane

Differential Revision: https://reviews.llvm.org/D151947

I've kept the legalForCartesianProduct call, but this requires us to maintain 32-bit/64-bit integer lists - we might want to just use legalIf and perform the type pair set matching manually.

Reviewed By: aykevl, Patryk27

Differential Revision: https://reviews.llvm.org/D152087

The constructor hasn't been used since its introduction.

[GlobalIsel][X86] Move G_PTRTOINT/G_INTTOPTR legalization before legacy handling and merge 32-bit/64-bit handling

I've kept the legalForCartesianProduct call, but this requires us to maintain 32-bit/64-bit integer lists - we might want to just use legalIf and perform the type pair set matching manually.

Make `qualifyWindowsLibrary` and `addStackProbeTargetAttributes`
protected members of `TargetCodeGenInfo`.
These are helper functions used by `getDependentLibraryOption` and
`setTargetAttributes` methods when targeting Windows. The change will
allow these functions to be reused after splitting `TargetInfo.cpp`.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D150178

We're moving away from using per-ISA legalization controls and using LegalIf etc. to handle specific ISAs instead.

This reverts commit e0ba9b2a.

This patch creates skeleton implementation for the DWARFLinkerParallel.
It also integrates DWARFLinkerParallel into dsymutil and llvm-dwarfutil,
so that empty DWARFLinker::link() can be called. To do this new command
line option is added "--linker apple/llvm". Additionally it changes
existing DWARFLinker interfaces/implementations to be compatible:
use Error for error reporting for the DWARFStreamer, make DWARFFile to
owner of referenced resources, other small refactorings.

Differential Revision: https://reviews.llvm.org/D147952

The lists contain differences between register numbers, not the register
numbers themselves. Since a difference can also be negative, this also
changes its type to signed.

Changing the type to signed exposed a "bug". For AMDGPU, which has many
registers, the first element of a sequence could be as big as ~45k.
The value does not fit into int16_t, but fits into uint16_t. The bug
didn't show up because of unsigned wrapping and truncation of the Val
field in the advance() method.

To fix the issue, I changed the way regunit difflists are encoded. The
4-bit 'scale' field of MCRegisterDesc::RegUnit was replaced by 12-bit
number of the first regunit, and the first element of each of the lists
was removed. The higher 20 bits of RegUnit field contain the initial
offset into DiffLists array.
AMDGPU has 1'409 regunits (2^12 = 4'096), and the biggest offset is
80'041 (2^20 = 1'048'576). That is, there is enough room.

Changing the encoding method also resulted in a smaller array size, the
numbers are below (I omitted targets with less than 100 elements).

```
AMDGPU   | 80052 | 78741 |  -1,6%
RISCV    |  6498 |  6297 |  -3,1%
ARM      |  4181 |  3966 |  -5,1%
AArch64  |  2770 |  2592 |  -6,4%
PPC      |  1578 |  1441 |  -8,7%
Hexagon  |   994 |   740 | -25,6%
R600     |   508 |   398 | -21,7%
VE       |   471 |   459 |  -2,5%
Sparc    |   381 |   363 |  -4,7%
X86      |   326 |   208 | -36,2%
Mips     |   253 |   200 | -20,9%
SystemZ  |   186 |   162 | -12,9%
```

Reviewed By: foad, arsenm

Differential Revision: https://reviews.llvm.org/D151036

Replace the legacy G_AND/G_OR/G_XOR legalizer, this handles all scalar promotion and vector clamping (allows AVX1 to handle 256-bit logic ops).

D151036 adds an assertions that prohibits iterating over sub- and
super-registers of a null register. This is already the case when
iterating over register units of a null register, and worked by
accident for sub- and super-registers.

Reviewed By: kparzysz

Differential Revision: https://reviews.llvm.org/D151406

In some rare corner cases where in between the div/rem pair there's a def of
the second instruction's source (but a different vreg due to the combine's
eqivalence checks), it will place the DIVREM at the first instruction's point,
causing a use-before-def. There wasn't an obvious fix that stood out to me
without doing more involved analysis than a combine should really be doing.

Fixes issue #60516

I'm open to new suggestions on how to approach this, as I'm not too happy
at bailing out here. It's not the first time we run into issues with value liveness
that the DAG world isn't affected by.

Differential Revision: https://reviews.llvm.org/D144336

Differential Revision: https://reviews.llvm.org/D152056

The corresponding function definition was removed by:

  commit 087a8eea
  Author: Nikita Popov <nikita.ppv@gmail.com>
  Date:   Sun Jul 25 18:21:13 2021 +0200

The corresponding function definition was removed by:

  commit 95a8e8a2
  Author: Jonas Devlieghere <jonas@devlieghere.com>
  Date:   Tue Dec 3 11:10:04 2019 -0800

The corresponding function definition was removed by:

  commit f634c900
  Author: Richard Smith <richard-llvm@metafoo.co.uk>
  Date:   Fri Mar 16 06:12:59 2012 +0000

Use the proper capitalization here as well as a init capture for better
identifiers.

Fixes https://github.com/llvm/llvm-project/issues/63098

Reviewed by: benshi001

Differential Revision: https://reviews.llvm.org/D152063