llvm-svn: 225482

Previously, MemoryDependenceAnalysis::getNonLocalPointerDependency was taking a list of properties about the instruction being queried. Since I'm about to need one more property to be passed down through the infrastructure - I need to know a query instruction is non-volatile in an inner helper - fix the interface once and for all.

I also added some assertions and behaviour clarifications around volatile and ordered field accesses. At the moment, this is mostly to document expected behaviour. The only non-standard instructions which can currently reach this are atomic, but unordered, loads and stores. Neither ordered or volatile accesses can reach here.

The call in GVN is protected by an isSimple check when it first considers the load. The calls in MemDepPrinter are protected by isUnordered checks. Both utilities also check isVolatile for loads and stores.

llvm-svn: 225481

This support is still incomplete and consequently hidden behind a switch that
needs to be enabled. One problem is ATM that we incorrectly interpret very large
unsigned values as negative values even if used in an unsigned comparision.

llvm-svn: 225480

Omission pointed out by Sean Silva!

llvm-svn: 225479

llvm-svn: 225478

llvm-svn: 225477

Create new copies of distinct `MDNode`s instead of following the
uniquing `MDNode` logic.

Just like self-references (or other cycles), `MapMetadata()` creates a
new node.  In practice most calls use `RF_NoModuleLevelChanges`, in
which case nothing is duplicated anyway.

Part of PR22111.

llvm-svn: 225476

Update testcases for LLVM change in r225474 to make `MDNode`s explicitly
distinct (when they aren't uniqued).

Part of PR22111.

llvm-svn: 225475

Propagate whether `MDNode`s are 'distinct' through the other types of IR
(assembly and bitcode).  This adds the `distinct` keyword to assembly.

Currently, no one actually calls `MDNode::getDistinct()`, so these nodes
only get created for:

  - self-references, which are never uniqued, and
  - nodes whose operands are replaced that hit a uniquing collision.

The concept of distinct nodes is still not quite first-class, since
distinct-ness doesn't yet survive across `MapMetadata()`.

Part of PR22111.

llvm-svn: 225474

llvm-svn: 225473

llvm-svn: 225472

MachineLICM uses a callback named hasLowDefLatency to determine if an
instruction def operand has a 'low' latency. If all relevant operands have a
'low' latency, the instruction is considered too cheap to hoist out of loops
even in low-register-pressure situations. On PowerPC cores, both the embedded
cores and the others, there is no reason to believe that this is a good choice:
all instructions have a cost inside a loop, and hoisting them when not limited
by register pressure is a reasonable default.

llvm-svn: 225471

Add a command-line option to enable hoisting even cheap instructions (in
low-register-pressure situations). This is turned off by default, but has
proved useful for testing purposes.

llvm-svn: 225470

This should fix https://code.google.com/p/address-sanitizer/issues/detail?id=368.

llvm-svn: 225469

Drive-by cleanup; I noticed this when reviewing the patch that became
r225466.

llvm-svn: 225468

The assert was being triggered when the distance between a constant pool entry
and its user exceeded the maximally allowed distance after thumb2 branch
shortening. A padding was inserted after a thumb2 branch instruction was shrunk,
which caused the user to be out of range. This is wrong as the padding should
have been inserted by the layout algorithm so that the distance between two
instructions doesn't grow later during thumb2 instruction optimization.

This commit fixes the code in ARMConstantIslands::createNewWater to call
computeBlockSize and set BasicBlock::Unalign when a branch instruction is
inserted to create new water after a basic block. A non-zero Unalign causes
the worst-case padding to be inserted when adjustBBOffsetsAfter is called to
recompute the basic block offsets.

rdar://problem/19130476

llvm-svn: 225467

Patch by Ramkumar Ramachandra!

llvm-svn: 225466

This was only handling the libcall. This is another example
of why only the intrinsic should ever be used when it exists.

llvm-svn: 225465

llvm-svn: 225464

It also comes with a (rudimentary) test case that gets itself in a failed update scenario, and checks that we don't crash
This is the easiest case I could think of that forces the failed update case Zachary was seeing

llvm-svn: 225463

"jit" doesn't exist anymore.

llvm-svn: 225462

AF = dyn_cast<SCEVAddRecExpr>(Pair.second) may be NULL for some SCEVs that we do
not support. When reporting the error we still want to pass a pointer that is
known to always be non-NULL.

I do not yet have a test case for this, unfortunately.

llvm-svn: 225461

strings from the copies that remain.

llvm-svn: 225460

than a pointer to make unifying code a bit easier.

llvm-svn: 225459

only the subtarget.

llvm-svn: 225458

llvm-svn: 225457

llvm-svn: 225456

llvm-svn: 225455

llvm-svn: 225454

It now checks for the end of the line or the opening '{'.
While at it, remove empty comments.

llvm-svn: 225451

Summary: The PIC additions didn't update the prologue and epilogue code to save and restore r30 (PIC base register).  This does that.

Test Plan: Tests updated.

Reviewers: hfinkel

Reviewed By: hfinkel

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6876

llvm-svn: 225450

llvm-svn: 225449

llvm-svn: 225448

- includes header/footer as required by MELPA
- correctly handles buffers that are not associated with a file
- displays stderr and exit code of clang-format process
- customizable via the emacs customization interface and file-/directory-
  local variables

Patch by Johann Klähn.

llvm-svn: 225447

This partially fixes PR13007 (ARM CodeGen fails with large stack
alignment): for ARM and Thumb2 targets, but not for Thumb1, as it
seems stack alignment for Thumb1 targets hasn't been supported at
all.

Producing an aligned stack pointer is done by zero-ing out the lower
bits of the stack pointer. The BIC instruction was used for this.
However, the immediate field of the BIC instruction only allows to
encode an immediate that can zero out up to a maximum of the 8 lower
bits. When a larger alignment is requested, a BIC instruction cannot
be used; llvm was silently producing incorrect code in this case.

This commit fixes code generation for large stack aligments by
using the BFC instruction instead, when the BFC instruction is
available.  When not, it uses 2 instructions: a right shift,
followed by a left shift to zero out the lower bits.

The lowering of ARM::Int_eh_sjlj_dispatchsetup still has code
that unconditionally uses BIC to realign the stack pointer, so it
very likely has the same problem. However, I wasn't able to
produce a test case for that. This commit adds an assert so that
the compiler will fail the assert instead of silently generating
wrong code if this is ever reached.

llvm-svn: 225446

Its functionality has been replaced by calling
SIInstrInfo::legalizeOperands() from
SIISelLowering::AdjstInstrPostInstrSelection() and running the
SIFoldOperands and SIShrinkInstructions passes.

llvm-svn: 225445

This makes piped output easier to read in many instances.

Before:
  llvm::errs() << aaaa << std::endl << bbbb << std::endl;

After:
  llvm::errs() << aaaa << std::endl
               << bbbb << std::endl;

Also fix a few instance of "don't use else after return" as per the
coding standards.

llvm-svn: 225444

Differential Revision: http://reviews.llvm.org/D6825

llvm-svn: 225443

If there are some non-ascii character in the input source code, the
column index might be smallar than the byte index.  This will result
in two possible assertion failures.  This CL fixes the computation of
the column index and byte index.

1. The assertion in startOfNextColumn() and startOfPreviousColumn()
   should not be raised when the byte index is greater than the column
   index since the non-ascii characters may use more than one bytes to
   store a character in a column.

2. The length of the caret line should be equal to the number of columns
   of source line, instead of the length of the source line.  Otherwise,
   the assertion in selectInterestingSourceRegion will be raised because
   the removed columns plus the kept columns are not greater than the max
   column, which means that we should not remove any column at all.

llvm-svn: 225442

llvm-svn: 225441