Add '# REQUIRES: systemz-registered-target' in the new tests.

Summary:
If the GEP instructions are going to be vectorized, the indices in those
GEP instructions must be of the same type. Otherwise, the compiler may
crash when trying to build the vector constant.

Reviewers: RKSimon, spatel

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69627

Summary:
llvm-ar's mri-utf8.test test relies on the en_US.UTF-8 locale to be
installed for its last RUN line to work. If not installed, the unicode
string gets encoded (interpreted) as ascii which fails since the most
significant byte is non zero. This commit changes the test to only rely
on the system being able to encode the pound sign in its default
encoding (e.g. UTF-16 for Microsoft Windows) by always opening the file
via input/output redirection. This avoids forcing a given locale to be
present and supported. A Byte Order Mark is also added to help
recognizing the encoding of the file and its endianness. Finally the
XFAIL on system-darwin is removed since the test actually passes fine on
Mac OS X and XFAIL was only added because it failed before.

Reviewers: gbreynoo, MaskRay, rupprecht, JamesNagurne, jfb

Subscribers: dexonsmith, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68472

Review: Ulrich Weigand
https://reviews.llvm.org/D68267

MachineVerifier::visitMachineFunctionAfter() is extended to check the
live-through case for live-in lists. This is only done for registers without
aliases and that are neither allocatable or reserved, such as the SystemZ::CC
register.

The MachineVerifier earlier only catched the case of a live-in use without
an entry in the live-in list (as "using an undefined physical register").

A comment in LivePhysRegs.h has been added stating a guarantee that
addLiveOuts() can be trusted for a full register both before and after
register allocation.

Review: Quentin Colombet
https://reviews.llvm.org/D68267

Fix static analyzer operator precedence warnings with suitable bracketing. Pull out the mask generation code so clang-format doesn't make such a mess of it.

Use X86 instead of X32 and add a common CHECK prefix

For this test, FileCheck is not run with the CHECK prefix; it seems
COMMON was intended here.

The Arm backend will usually return false for isFMAFasterThanFMulAndFAdd,
where both the fused VFMA.f32 and a non-fused VMLA.f32 are usually
available for scalar code. For MVE we don't have the non-fused version
though. It makes more sense for isFMAFasterThanFMulAndFAdd to return
true, allowing us to simplify some of the existing ISel patterns.

The tests here are that non of the existing tests failed, and so we are
still selecting VFMA and VFMS. The one test that changed shows we can
now select from fast math flags, as opposed to just relying on the
isFMADLegalForFAddFSub option.

Differential Revision: https://reviews.llvm.org/D69115

As noted in follow-up to:
rGa1e8ad4f

It's not safe to assume that an element of the constant is always
non-null. It's definitely not an expected case for the current
instcombine user, but that may not hold if this function is
eventually called from arbitrary places.

Typo in comment.  NFC.

Also reverts r353980 since that duplicated the GenAsmMatcher target for
AArch64. Instead use visiblity.

This reverts commit 2be17087. Fails ASAN.

Fill in the gaps for vrev32.16 f16 patterns, extending the existing i16
patterns.

Differential Revision: https://reviews.llvm.org/D69508

This is part of a series of patches needed to solve PR39535:
https://bugs.llvm.org/show_bug.cgi?id=39535

The easy code fix won't catch non-canonical mismatched
constant patterns, so adding extra coverage for those in
case we decide that's important (but seems unlikely).

Patch by Anastasia Stulova and Sven van Haastregt.

Differential Revision: https://reviews.llvm.org/D68781

This is a special calling convention to be used by the GHC compiler.

Author: Stefan Schulze Frielinghaus
Differential Revision: https://reviews.llvm.org/D69024

The addition of FMF for select allows more folding for these
kinds of patterns.

Also only print each such warning once.

LLVM-style output will now print "<?>" for sections it cannot identify,
e.g. because the section index is invalid. GNU output continues to print
the raw index. In both cases where the st_shndx value is SHN_XINDEX and
the index cannot be looked up in the SHT_SYMTAB_SHNDX section (e.g.
because it is missing), the symbol is printed like other symbols with
st_shndx >= SHN_LORESERVE.

Reviewed by: grimar, MaskRay

Differential Revision: https://reviews.llvm.org/D69671

[X86] SimplifyDemandedVectorElts - attempt to recombine target shuffle using DemandedElts mask (REAPPLIED)

If we don't demand all elements, then attempt to combine to a simpler shuffle.

At the moment we can only do this if Depth == 0 as combineX86ShufflesRecursively uses Depth to track whether the shuffle has really changed or not - we'll need to change this before we can properly start merging combineX86ShufflesRecursively into SimplifyDemandedVectorElts (see D66004).

This reapplies rL368307 (reverted at rL369167) after the fix for the infinite loop reported at PR43024 was applied at rG3f087e38

Reviewers: RKSimon, ostannard

Reviewed By: RKSimon

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69795

Summary: The hook should work for any RISC-V register. Non-allocatable registers
do not need to be reserved, for the remaining the hook will only succeed
if you pass clang the -ffixed-xX flag. This builds upon D67185, which
currently only allows reserving GPRs.

Reviewers: asb, lenary

Reviewed By: lenary

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69130

This was an experiment made possible by a non-standard feature of the
Android dynamic loader.

It required introducing a flag to tell the compiler which ABI was being
targeted.
This flag is no longer needed, since the generated code now works for
both ABI's.

We leave that flag untouched for backwards compatibility. This also
means that if we need to distinguish between targeted ABI's again
we can do that without disturbing any existing workflows.

We leave a comment in the source code and mention in the help text to
explain this for any confused person reading the code in the future.

Patch by Matthew Malcomson

Differential Revision: https://reviews.llvm.org/D69574

Ocaml support was removed.

Summary:
This function is only used internally by ClangExpressionParser. By putting it in the ExpressionParser class all languages
that implement ExpressionParser::Parse have to share the same signature (which forces us in downstream to add
swift-specific arguments to ExpressionParser::Parse which then propagate to ClangExpressionParser and so on).

Reviewers: davide

Subscribers: JDevlieghere, lldb-commits

Tags: #upstreaming_lldb_s_downstream_patches, #lldb

Differential Revision: https://reviews.llvm.org/D69710

Demand that an immediate offset to a PC relative address fits in 32 bits, or
else load it into a register and perform a separate add.

Verify in the assembler that such immediate offsets fit the bitwidth.

Even though the final address of a Load Address Relative Long may fit in 32
bits even with a >32 bit offset (depending on where the symbol lives relative
to PC), the GNU toolchain demands the offset by itself to be in range. This
patch adapts the same behavior for llvm.

Review: Ulrich Weigand
https://reviews.llvm.org/D69749

The sink-after and interleave-group vectorization decisions were so far applied to
VPlan during initial VPlan construction, which complicates VPlan construction – also because of
their inter-dependence. This patch refactors buildVPlanWithRecipes() to construct a simpler
initial VPlan and later apply both these vectorization decisions, in order, as VPlan-to-VPlan
transformations.

Differential Revision: https://reviews.llvm.org/D68577

Summary:
I don't see why this test needs to compile this rather complicated file for just testing module sections. This just removes all this code with a simple
"Hello world!" program which should be faster to compile

Reviewers: labath, davide, JDevlieghere

Reviewed By: JDevlieghere

Subscribers: jfb, lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D69705

Summary:
We disabled registration by providing an empty `registerEHFrames`, so we should also provide an empty `deregisterEHFrames`
in case that function relies on `registerEHFrames` being called before. Currently `deregisterEHFrames` is a no-op anyway
as it just iterates over the (empty( list of registered EHFrames and then clear the empty list.

Reviewers: davide, JDevlieghere

Reviewed By: JDevlieghere

Subscribers: JDevlieghere, lldb-commits

Tags: #upstreaming_lldb_s_downstream_patches, #lldb

Differential Revision: https://reviews.llvm.org/D69713

[lldb] Provide a getter for m_materializer_up in LLVMUserExpression instead of relying on it being accessible.

Summary:
Motivated by Swift using the materializer in a few places which requires us to add this getter ourselves.
We also need a setter, but let's keep this minimal to unblock the downstream reverts in Swift.

Reviewers: davide

Reviewed By: davide

Subscribers: abidh, JDevlieghere, lldb-commits

Tags: #upstreaming_lldb_s_downstream_patches, #lldb

Differential Revision: https://reviews.llvm.org/D69714

Reviewers: JDevlieghere

Reviewed By: JDevlieghere

Subscribers: JDevlieghere, lldb-commits

Tags: #upstreaming_lldb_s_downstream_patches, #lldb

Differential Revision: https://reviews.llvm.org/D69717

Summary:
This patch sets the FPSW (X87 floating-point status register) as a reserved
physical register and fix the test failure caused by [[ https://reviews.llvm.org/D68854| D68854 ]].

Before this patch, some tests will fail because it implicit uses FPSW without
define it. Setting the FPSW as a reserved physical register will skip liveness
analysis because it is always live.

Reviewers: pengfei, craig.topper

Reviewed By: craig.topper

Subscribers: craig.topper, hiraditya, llvm-commits

Patch by LiuChen.

Differential Revision: https://reviews.llvm.org/D69784