- Jun 26, 2023
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Craig Topper authored
We were only checking for the previous insructions to write exactly the register or a super register. We ignored writes to a subregister and continued searching for the producing instruction. We need to abort instead. There's another check inside the if body to abort if the registers don't match exactly. So we just need to check for overlap so we enter the if body. Reviewed By: fakepaper56 Differential Revision: https://reviews.llvm.org/D153490
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Craig Topper authored
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Craig Topper authored
Inspired by D153235, I think bit manipulation makes more sense on unsigned types. Reviewed By: Jim Differential Revision: https://reviews.llvm.org/D153403
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Jim Lin authored
Input argument of clz and ctz should be unsigned type and return value should be integer like `builtin_clz` and `builtin_ctz` defined in clang/include/clang/Basic/Builtins.def. Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D153235
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Craig Topper authored
It was only used for the compressed instruction c.jr which expands to jalr with rd=x0. Use WriteJalr instead to match jalr.
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Aiden Grossman authored
This reverts commit 0b6b400b. The sporadic test failures were fixed during this land, but I forgot to fix the build failures on certain platforms (seems to mostly be AArch64/PPC) that result from them not being able to find the symbols for shm_open and shm_unlink.
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WANG Xuerui authored
Apart from general feature parity, this is also necessary for enabling ClangBuiltLinux that defaults to using LLVM tools. While at it, add a missing comment for the Hexagon definition directly above, so it doesn't get confused with the SPARC definitions. Reviewed By: SixWeining, MaskRay, jhenderson Differential Revision: https://reviews.llvm.org/D153609
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Weining Lu authored
Linux LoongArch port [1] uses `-msoft-float` (implies no FPU) in its `cflags` while it also uses floating-point insns in asm sources [2]. GAS allows this usage while IAS currently does not. This patch removes `AssemblerPredicate`s for floating-point insns so that to make IAS compitable with GAS. Similarly, also remove `AssemblerPredicate`s for other ISA extensions, i.e. lsx/las/lvz/lbt. [1]: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/loongarch/Makefile?h=v6.4-rc1#n49 [2]: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/loongarch/kernel/fpu.S?h=v6.4-rc1#n29 Reviewed By: xen0n, hev Differential Revision: https://reviews.llvm.org/D150196
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Weining Lu authored
I meant to fold this into 47601815 but failed to do so. Reviewed By: MaskRay Differential Revision: https://reviews.llvm.org/D152671
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Aiden Grossman authored
This patch introduces the SubprocessMemory class to llvm-exegesis. This class contains several utilities that are needed for managing memory to set up an execution environment for memory annotations. Reviewed By: courbet Differential Revision: https://reviews.llvm.org/D151022
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Wang Rui authored
This patch optimizes code generation by leveraging the zeroing behavior of the `maskeqz`/`masknez` instructions. ``` int sel(int a, int b) { return (a < b) ? a : 0; } ``` ``` slt $a1,$a0,$a1 masknez $a2,$r0,$a1 maskeqz $a0,$a0,$a1 or $a0,$a0,$a2 ``` => ``` slt $a1,$a0,$a1 maskeqz $a0,$a0,$a1 ``` Reviewed By: SixWeining Differential Revision: https://reviews.llvm.org/D153193 -
Weining Lu authored
This reverts commit 3dd319ec. Sorry, I forgot to amend the author name and email when merging this patch.
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Aiden Grossman authored
This patch introduces the subprocess executor mode. Currently, this new mode doesn't do anything fancy, just executing the same code that the inprocess executor would do, but within a subprocess. This sets up the ability to add in many more memory-related features in the future. Reviewed By: courbet Differential Revision: https://reviews.llvm.org/D151021
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Younan Zhang authored
This is a follow-up patch to D126194 in order to fix https://github.com/llvm/llvm-project/issues/63503. Reviewed By: shafik Differential Revision: https://reviews.llvm.org/D153724
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Jie Fu authored
/data/llvm-project/llvm/lib/Transforms/Utils/SimplifyCFG.cpp:6051:10: error: unused variable 'Inc' [-Werror,-Wunused-variable] bool Inc, Wrapped = false; ^ 1 error generated. -
Aiden Grossman authored
This patch gives the ability to assign performance counters within llvm-exegesis to a specific process by passing its PID. This is needed later on for implementing a subprocess executor. Defaults to zero, the current process, for the InProcessFunctionExecutorImpl. Reviewed By: courbet Differential Revision: https://reviews.llvm.org/D151020
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khei4 authored
Differential Revision: https://reviews.llvm.org/D150943
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khei4 authored
Differential Revision: https://reviews.llvm.org/D153238
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Matt Arsenault authored
This tried to query the physical subregister on virtual registers if they were left unassigned.
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Matt Arsenault authored
f64->f16 is hard. The expansion is all integer but we need to raise exceptions. Also doesn't handle the illegal f16 targets.
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Matt Arsenault authored
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Amaury Séchet authored
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Amaury Séchet authored
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Niwin Anto authored
[AArch64][GlobalISel] IR translate support for a return instruction of type <1 x i8> or <1 x i16> when using GlobalISel. Code generation for return instruction of type <1 x i8> or <1 x i16> when using GlobalISel causes internal compiler crash Could not handle ret ty. Fixes: https://github.com/llvm/llvm-project/issues/58211 Differential Revision: https://reviews.llvm.org/D153300
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Tobias Stadler authored
This implements the remaining overflow generating instructions in the AArch64 GlobalISel selector. Now wide add/sub operations do not fallback to SelectionDAG anymore. We make use of PostSelectOptimize to cleanup the hereby generated flag-setting operations when the carry-out is unused. Since we do not fallback anymore when selecting add/sub atomics on O0 some test changes were required there. Fixes: https://github.com/llvm/llvm-project/issues/59407 Differential Revision: https://reviews.llvm.org/D153164
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Amaury Séchet authored
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Piotr Zegar authored
This reverts commit 81418ada.
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Mike Crowe authored
Add FormatStringConverter utility class that is capable of converting printf-style format strings into std::print-style format strings along with recording a set of casts to wrap the arguments as required and removing now-unnecessary calls to std::string::c_str() and std::string::data() Use FormatStringConverter to implement a new clang-tidy check that is capable of converting calls to printf, fprintf, absl::PrintF, absl::FPrintF, or any functions configured by an option to calls to std::print and std::println, or other functions configured by options. In other words, the check turns: fprintf(stderr, "The %s is %3d\n", description.c_str(), value); into: std::println(stderr, "The {} is {:3}", description, value); if it can. std::print and std::println can do almost anything that standard printf can, but the conversion has some some limitations that are described in the documentation. If conversion is not possible then the call remains unchanged. Depends on D153716 Reviewed By: PiotrZSL Differential Revision: https://reviews.llvm.org/D149280 -
Mike Crowe authored
This will be used by the modernize-use-std-print clang-tidy check and related checks later. Reviewed By: PiotrZSL Differential Revision: https://reviews.llvm.org/D153716
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Nico Weber authored
This reverts commit 3eee5aa5. Breaks tests on mac, see https://reviews.llvm.org/D152785#4447118
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Florian Hahn authored
Add extra tests where conditions are used in phis for D153660.
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- Jun 25, 2023
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Florian Hahn authored
Add uses of conditions, so the test keeps testing what it is meant to test after D153660.
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Takuya Shimizu authored
Consider the following piece of code: ``` void func( int aa, int bb, int cc) {} void arity_mismatch() { func(2, 4); } ``` BEFORE: ``` source.cpp:6:3: error: no matching function for call to 'func' 6 | func(2, 4); | ^~~~ source.cpp:1:6: note: candidate function not viable: requires 3 arguments, but 2 were provided 1 | void func( int aa, | ^ ``` AFTER: ``` source.cpp:6:3: error: no matching function for call to 'func' 6 | func(2, 4); | ^~~~ source.cpp:1:6: note: candidate function not viable: requires 3 arguments, but 2 were provided 1 | void func( int aa, | ^ ~~~~~~~ 2 | int bb, | ~~~~~~~ 3 | int cc) {} | ~~~~~~ ``` Reviewed By: cjdb, aaron.ballman Differential Revision: https://reviews.llvm.org/D153267 -
Elliot Goodrich authored
This reverts commit 2fa0dbd7.
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Elliot Goodrich authored
Move the implementation of the `toString` function from `llvm/Support/Error.h` to the source file, which allows us to move `#include "llvm/ADT/StringExtras.h"` to the source file as well. As `Error.h` is present in a large number of translation units this means we are unnecessarily bringing in the contents of `StringExtras.h` - itself a large file with lots of includes - and slowing down compilation. Also move the `#include "llvm/ADT/SmallVector.h"` directive to the source file as it's no longer needed, but this does not give as much of a benefit. This reduces the total number of preprocessing tokens across the LLVM source files in lib from (roughly) 1,920,413,050 to 1,903,629,230 - a reduction of ~0.87%. This should result in a small improvement in compilation time. Differential Revision: https://reviews.llvm.org/D153229
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Elliot Goodrich authored
In preparation for removing the `#include "llvm/ADT/StringExtras.h"` from the header to source file of `llvm/Support/Error.h`, first add in all the missing includes that were previously included transitively through this header.
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Corentin Jabot authored
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Craig Topper authored
Reviewed By: wangpc Differential Revision: https://reviews.llvm.org/D153669
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Craig Topper authored
SiFive7's scalar execution consists of 4 stages AG, M1, M2, WB. Most simple arithmetic and branch instructions can execute in either AG or M2. If the operands are ready, the instruction will execute in the AG stage. Otherwise, it executes in the M2 stage. Everything is fully bypassed, so dependent instructions should only see 1 cycle latency. This patch adds ReadAdvances to pretend that these instructions execute in the M2 ALU and reads their operands then. This allows the scheduler to schedule dependent instructions back to back. I've increased branch latency to 3 since they are also executed in both stages. Still need to fix JALR, but I want to cleanup some scheduler classes first. Multiply, cpop and division instructions can only start in the AG stage. Still need to do some work for FP instructions that produce integer results. I've added an llvm-mca test that creates a long dependency chain. The timeline view can show that things are bypassed. I didn't check all permutations, but we have some variety. Reviewed By: wangpc Differential Revision: https://reviews.llvm.org/D153666
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David Green authored
Now that the SVE parts are in, we can fill in the double reduction tests without them causing problems.
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