one of the tests in StrtolTest.h is intended to detect that 32 bit longs
are handled correctly, but it wasn't using the correct value for errno
causing failures.

Differential Revision: https://reviews.llvm.org/D140577

This patch fixes:

  lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp:1378:16:
  warning: control reaches end of non-void function [-Wreturn-type]

This reverts commit 9739bb81.
It causes `.module is not permitted after generating code`
for Linux kernel's `ARCH=mips 32r1_defconfig` clang+GNU as build.
It's confirmed as a defect, but the proper fix needs time to sort out.

Sphinx build was broken.

This patch fixes:

  mlir/lib/Analysis/DataFlow/SparseAnalysis.cpp:321:19: warning:
  unused variable ‘block’ [-Wunused-variable]

Few uses of free have not yet been replaced by the custom operator
delete yet. They will be done in a follow up patch.

Reviewed By: lntue, michaelrj

Differential Revision: https://reviews.llvm.org/D140526

This patch fixes:

  third-party/unittest/googletest/include/gtest/gtest.h:1526:11:
  error: comparison of integers of different signs: 'const unsigned
  long' and 'const int' [-Werror,-Wsign-compare]

Currently, setting -DLLVM_ENABLE_LLD=ON on windows also requires setting
-DCMAKE_LINKER=lld-link.exe. This is both misleading and redundant.

Fix this by trying to find llvm-link.exe when -DLLVM_ENABLE_LLD=ON is
set and CMAKE_LINKER is not, and aborting otherwise.

Differential Revision: https://reviews.llvm.org/D140534

Explicitly track the UFs supported in a VPlan. This is needed to
allow transformations to restrict the UFs which are supported.

Discussed as separate improvement in D135017.

In LowerSELECT_CC, SELECT_REG between two f128s should only be emitted if we
have hardware quadfloat enabled.

This should fix issue #59646

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D140515

Adds documentation and shows a help message when running the script
without arguments.

Lands parts of D139545.

Previously the tests were copy/pasted into several files, this changes
them to be instead templated and sharing one file.

Reviewed By: lntue

Differential Revision: https://reviews.llvm.org/D140441

The format function test serve two purposes:
- Test whether all format functions work in general.
- Test whether all formatting rules are implemented correctly.

At the moment the *pass.cpp tests do both. These tests are quite slow,
while testing all rules for all functions doesn't add much coverage.

There are two execution modi of the format functions:
- run-time validation in the vformat functions.
- compile-time validation in the other function.

So instead of running all tests for all functions, they are only used for
format.pass.cpp and vformat.pass.cpp still do all tests.

The other tests do a smaller set of test, just to make sure they work in the
basics.

Running the format tests using one thread:
- before 00:04:16
- after  00:02:14

The slow tests were also reported in
https::llvm.org/PR58141

Also split a generic part of the test to a generic support header. This
allows these parts to be reused in the range-based formatter tests.

Reviewed By: #libc, ldionne

Differential Revision: https://reviews.llvm.org/D140115

Implements parts of
- P2286R8 Formatting Ranges

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D136775

All members are now private and access is through delegate
or convenience methods only (except the loop emitter, which
is still under refactoring).

Reviewed By: Peiming

Differential Revision: https://reviews.llvm.org/D140519

StreamingInterfaceINTEL has been recently added to the SPIR-V headers:
https://github.com/KhronosGroup/SPIRV-Headers/commit/70ff9d939cd7fd0c758756ac57ab0c7c6d6c64d6

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D140476

We are in the process of enabling sanitizer_common unit tests on arm64 for apple devices. rdar://101436019

The test `CompactRingBuffer.int64` is failing on arm64 with the error:

```==17265==ERROR: SanitizerTool failed to deallocate 0xfffffffffffff000 (-4096) bytes at address 0x000105c30000
SanitizerTool: CHECK failed: sanitizer_posix.cpp:63 "(("unable to unmap" && 0)) != (0)" (0x0, 0x0) (tid=157296)```

If page size is sufficiently larger than alignment then this code:
   UnmapOrDie((void*)end, map_end - end);
end is will be greater than map_end causing the value passed to UnmapOrDie to be negative.

This is caused when GetPageSizeCached returns 16k and alignment is 8k.
map_size and what is mapped by mmap uses size and alignment which is smaller than what is calculated by end using the actual page size.
Therefore, map_end ends up being less than end.
The call to mmap is allocating sufficent page-aligned memory, because it calls RoundUp within MmapOrDieOnFatalError.
But this size is not being captured by map_size.

We can address this by rounding up map_size here to be page-aligned. This ensures that map_end will be greater than or equal to end and that it will match mmaps use of page-aligned value, and the
subsequent call to munmap will also be page-aligned.

Differential Revision: https://reviews.llvm.org/D140353

Add `nooutline` + update LangRef to say it exists.

This makes it possible to say "don't outline from this function ever."

We want to be able to toggle whether or not a function should be in the search
set regardless of default behaviour.

Add testcases for the IR Outliner + Machine Outliner.

Also remove an unnecessary check for an empty function in the Machine Outliner.

Differential Revision: https://reviews.llvm.org/D140438

Add support for the %e/E conversion in printf, as well as unit tests. It
does not yet support long doubles.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D140042

Make the lldb test target depend on LTO, since TestFullLtoStepping
needs it (prior to this patch, running "ninja check-lldb" would not
build libLTO).

Differential Revision: https://reviews.llvm.org/D140051

Use the readfirstlane hack for the scalar cases as a hack to
combine globalisel and sdag tests. gfx6 stores are a bit broken
in globalisel, and scalar returns are totally broken in sdag.

New symbol used by libcxx as of https://reviews.llvm.org/D138196, needs
to be added to the symbol deps list.

Currently the process is terminated after the timeout. Add an option
to let the process resume after the timeout instead.

https://reviews.llvm.org/D138952

This was never updated for the address space number shuffle.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D139234

This adds some tablegen patterns for RSHRN, which performs a rounding
shift with narrow. This is similar to the existing SHRN patterns with an
extra addition to perform the rounding, that adds 1<<(shift-1) before
the right shift. Because the round immediate and the shift amount are
tied, it goes via a ComplexPattern that uses a SelectRoundingVLShr
method to perform the selection checks.

aarch64_neon_rshrn are expanded into the sequence of equivalent
instructions (trunc(shr(add(x, 1<<(sht-1)), sht))) so that they can be
converted back into RSHRN. Which also allows us to match raddhn through
the adjusted patterns that previously used aarch64_neon_rshrn.

DIfferential Revision: https://reviews.llvm.org/D140297

Specify python3, and replace / with // to do integer division.

attr-or-type-format.td contains tests for various attributes and types,
but nowhere in the testsuite is the customAssemblyFormat for an EnumAttr
(enum class in C++) exercised. Fix this by adding a test.

Signed-off-by: Ramkumar Ramachandra <r@artagnon.com>

Differential Revision: https://reviews.llvm.org/D140034

Ensure scalar is at least as wide as type, but only if the specified condition
is met.

Reviewed By: paquette

Differential Revision: https://reviews.llvm.org/D140305

The attiny4/attiny5/attiny9/attiny10 have a slightly modified
instruction set that drops a number of useful instructions. This patch
makes sure to not emit them on these "reduced tiny" cores.

The affected instructions are:

  * lds and sts (load/store directly from data)
  * ldd and std (load/store with displacement)
  * adiw and sbiw (add/sub register pairs)
  * various other instructions that were emitted without checking
    whether the chip actually supports them (movw, adiw, etc)

There is a variant on lds and sts on these chips, but it can only
address a limited portion of the address space and is mainly useful to
load/store I/O registers (as an extension to the in and out
instructions). I have not implemented it here, implementing it can be
done in a separate patch.

This patch is not optimal. I'm sure it can be improved a lot. For
example, we could teach the instruction selector to not select lddw/stdw
instructions so that the weird pointer adjustments are not necessary.
But for now I've focused just on correctness, not on code quality.

Updates: https://github.com/llvm/llvm-project/issues/53459

Differential Revision: https://reviews.llvm.org/D131867

D72845 implemented the equivalent IR optimization in InstCombine so it
seems that there's no advantage to doing it during isel too.

This partially reverts D72844.

Differential Revision: https://reviews.llvm.org/D140546