- Dec 21, 2023
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Jay Foad authored
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Kerry McLaughlin authored
This patch enables the following builtins for SME2: - svld1, svld1_vnum - svldnt1, svldnt1_vnum - svst1, svst1_vnum - svstnt1, svstnt1_vnum
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madanial0 authored
The AIX linker does not support the `--whole-archive` option, removing the option if the OS is AIX. --------- Co-authored-by:Mark Danial <mark.danial@ibm.com>
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Shengchen Kan authored
According to Intel SDE, ADCX reads CF and ADOX reads OF. `Uses` was set to empty by accident, the bug was not exposed b/c compiler never emits these instructions.
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Jay Foad authored
It is used for FLAT atomics as well as Global atomics.
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Chia authored
Alive2 proof: https://alive2.llvm.org/ce/z/2P8gq- This patch closes #73905
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Krzysztof Parzyszek authored
Handle one more case missed in ad37c8694e.
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Nikita Popov authored
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Radu Salavat authored
Enable and test 'rdynamic' flag
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Shengchen Kan authored
1. Simplify the variable name 2. Change HasOddOpcode to HasEvenOpcode b/c a. opcode of any 8-bit arithmetic instruction is even b. opcode of a 16/32/64-bit arithmetic instruction is usually odd, but it can be even sometimes, e.g. INC/DEC, ADCX/ADOX c. so that we can remove `let Opcode = o` for the mentioned corner cases. -
Nikita Popov authored
Shufflevector semantics have changed so that poison mask elements return poison rather than undef. Reflect this in the canCreateUndefOrPoison() implementation.
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Tomas Matheson authored
- Adds a new +pc option to -mbranch-protection that will enable the use of PC as a diversifier in PAC branch protection code. - When +pauth-lr is enabled (-march=armv9.5a+pauth-lr) in combination with -mbranch-protection=pac-ret+pc, the new 9.5-a instructions (pacibsppc, retaasppc, etc) are used. Documentation for the relevant instructions can be found here: https://developer.arm.com/documentation/ddi0602/2023-09/Base-Instructions/ Co-authored-by:
Lucas Prates <lucas.prates@arm.com>
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Oliver Stannard authored
Add assembly/disassembly support for the new PAuthLR instructions introduced in Armv9.5-A: - AUTIASPPC/AUTIBSPPC - PACIASPPC/PACIBSPPC - PACNBIASPPC/PACNBIBSPPC - RETAASPPC/RETABSPPC - PACM Documentation for these instructions can be found here: https://developer.arm.com/documentation/ddi0602/2023-09/Base-Instructions/
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Tomas Matheson authored
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stephenpeckham authored
This presents misleading and confusing output. If you have a function defined at the beginning of an XCOFF object file, and you have a function call to an external function, the function call disassembles as a branch to the local function. That is, `void f() { f(); g();}` disassembles as >00000000 <.f>: 0: 7c 08 02 a6 mflr 0 4: 94 21 ff c0 stwu 1, -64(1) 8: 90 01 00 48 stw 0, 72(1) c: 4b ff ff f5 bl 0x0 <.f> 10: 4b ff ff f1 bl 0x0 <.f> With this PR, the second call will display: `10: 4b ff ff f1 bl 0x0 <.g> ` Using -r can help, but you still get the confusing output: >10: 4b ff ff f1 bl 0x0 <.f> 00000010: R_RBR .g -
David Spickett authored
Clearly I need my eyes checked, it wasn't linking to a non-existent library at all, I had the name wrong.
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David Spickett authored
I assumed since it was in the PR and seemed like a logical library to have, it would exist, but only `...Common` exists.
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madanial0 authored
Add fortran runtime libraries to flang-new on AIX Co-authored-by:Mark Danial <mark.danial@ibm.com>
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madanial0 authored
Add a new test for no-cpp-dep on AIX as it requires 64 bit OBJECT_MODE since only 64-bit AIX is supported. AIX does not allow `-o /dev/null` and requires `-lpthread` flag to be added. --------- Co-authored-by:Mark Danial <mark.danial@ibm.com>
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David Spickett authored
``` /home/worker/2.0.1/lldb-x86_64-debian/llvm-project/lldb/unittests/Utility/ChecksumTest.cpp:15:38: warning: suggest braces around initialization of subobject [-Wmissing-braces] static llvm::MD5::MD5Result hash1 = {0, 1, 2, 3, 4, 5, 6, 7, ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ { ``` And others. -
Andrzej Warzyński authored
Updates two tests for vector.contract -> vector.outerproduct transformations: 1. Rename "vector-contract-to-outerproduct-transforms.mlir" as "vector-contract-to-outerproduct-matmul-transforms.mlir". The new name more accurate captures what's being tested. it is also consistent with "vector-contract-to-outerproduct-matvec-transforms.mlir", which covers vector matvec operations and makes finding relevant tests easier. 2. For matmul tests, move the traits definining the iteration spaces to the top of the file. This is consistent with how matvec tests are defined and also makes it easy to quickly identify what cases are covered. 3. For matmul tests, use more meaningful names for function arguments. This helps keep things consistent across the file (i.e. function definitions wih check lines and comments). 4. For matvec test, move a few tests around so that the most basic case (without masking) is first. 5. Update comments.
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David Spickett authored
ld.lld: error: unable to find library -llldbPluginProcessWindowsCommon https://lab.llvm.org/buildbot/#/builders/96/builds/50407 Fixes 95e5839e.
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Shengchen Kan authored
1. Remove redandunt classes 2. Correct comments 3. Move duplicated `let` statement into class definition 4. Simplify the variable name and align the code
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oltolm authored
This PR adds support for thread names in lldb on Windows. ``` (lldb) thr list Process 2960 stopped thread #53: tid = 0x03a0, 0x00007ff84582db34 ntdll.dll`NtWaitForMultipleObjects + 20 thread #29: tid = 0x04ec, 0x00007ff845830a14 ntdll.dll`NtWaitForAlertByThreadId + 20, name = 'SPUW.6' thread #89: tid = 0x057c, 0x00007ff845830a14 ntdll.dll`NtWaitForAlertByThreadId + 20, name = 'PPU[0x1000019] physics[main]' thread #3: tid = 0x0648, 0x00007ff843c2cafe combase.dll`InternalDoATClassCreate + 39518 thread #93: tid = 0x0688, 0x00007ff845830a14 ntdll.dll`NtWaitForAlertByThreadId + 20, name = 'PPU[0x100501d] uMovie::StreamingThread' thread #1: tid = 0x087c, 0x00007ff842e7a104 win32u.dll`NtUserMsgWaitForMultipleObjectsEx + 20 thread #96: tid = 0x0890, 0x00007ff845830a14 ntdll.dll`NtWaitForAlertByThreadId + 20, name = 'PPU[0x1002020] HLE Video Decoder' <...> ```
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yan zhou authored
[CodeGen] This patch fix a bug that may caused error for a self-defined target in SelectionDAG::getNode (#75320) we need first judge N1.getNumOperands() > 0. If Lowering Generated SDNode like. ``` v2i32 t20: TargetOpNode. i32 t21: extract_vector_elt t20 0 i32 t22: extract_vector_elt t20 1 ``` will cause a error.
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Paschalis Mpeis authored
[TLI] Pass replace-with-veclib works with Scalable Vectors. The pass is heavily refactored. It uses the Masked variant of a TLI method when the Intrinsic operates on Scalable Vectors. Improve tests for ArmPL and SLEEF Intrinsics: - Auto-generate test `armpl-intrinsics.ll`, and use active lane mask to have shorter `shufflevector` check lines. - Update scripts now add `@llvm.compiler.used` instead of using the regex: `@[[LLVM_COMPILER_USED:[a-zA-Z0-9_$"\\.-]+]]` - Add simplifycfg pass and noalias to ensure tail folding. `noalias` attribute was added only to the `%in.ptr` parameter of the ArmPL Intrinsics.
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Dmitri Gribenko authored
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Christian Sigg authored
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Guillaume Chatelet authored
`FPBits` is currently implemented as a general case and a specialization for `long double` when `long double` is x86 80-bit extended precision. This patch is a first of a series to provide an implementation based on `FPType` instead of the C++ float type (which implementation is architecture dependent).
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Kerry McLaughlin authored
Adds the following SME2 builtins: - svrinta, svrintm, svrintn, svrintp (x2 & x4)
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Felipe de Azevedo Piovezan authored
If adding a user commands fails because a command with the same name already exists, we only say that "force replace is not set" without telling the user _how_ to set it. There are two ways to do so; this commit changes the error message to mention both.
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Z572 authored
fix https://github.com/llvm/llvm-project/issues/72259 proof: https://alive2.llvm.org/ce/z/HsrmTC
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Paschalis Mpeis authored
It sets a LibFunc similarly with the other two getLibFunc methods. Currently, it supports only the FRem Instruction. Add tests for FRem.
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zhongyunde 00443407 authored
The list of load.x is refer to canFoldIntoAddrMode on D152828. Also support LDRSroX missed in canFoldIntoAddrMode
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zhongyunde 00443407 authored
A case for this transformation, https://gcc.godbolt.org/z/nhYcWq1WE Fold mov w8, #56952 movk w8, #15, lsl #16 ldrb w0, [x0, x8] into add x0, x0, 1036288 ldrb w0, [x0, 3704] Only LDRBBroX is supported for the first time. Fix https://github.com/llvm/llvm-project/issues/71917
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zhongyunde 00443407 authored
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Yi Wu authored
Get login username, ussage: ``` CHARACTER(32) :: login CALL getlog(login) WRITE(*,*) login ``` getlog is required for an exascale proxyapp. https://proxyapps.exascaleproject.org/app/minismac2d/ https://github.com/Mantevo/miniSMAC/blob/f90446714226eeef650b78bce06ca4967792e74d/ref/smac2d.f#L615 https://github.com/Mantevo/miniSMAC/blob/f90446714226eeef650b78bce06ca4967792e74d/ref/smac2d.f#L1570 --------- Co-authored-by:
Yi Wu <43659785+PAX-12-WU@users.noreply.github.com> Co-authored-by:
Yi Wu <yiwu02@wdev-yiwu02.arm.com> Co-authored-by:
Kiran Chandramohan <kiranchandramohan@gmail.com>
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Jay Foad authored
Co-authored-by:Mirko Brkusanin <Mirko.Brkusanin@amd.com>
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Alex Zinenko authored
Revert "[mlir][python] Make the Context/Operation capsule creation methods work as documented. (#76010)" This reverts commit bbc29768. This change seems to be at odds with the non-owning part semantics of MlirOperation in C API. Since downstream clients can only take and return MlirOperation, it does not sound correct to force all returns of MlirOperation transfer ownership. Specifically, this makes it impossible for downstreams to implement IR-traversing functions that, e.g., look at neighbors of an operation. The following patch triggers the exception, and there does not seem to be an alternative way for a downstream binding writer to express this: ``` diff --git a/mlir/lib/Bindings/Python/IRCore.cpp b/mlir/lib/Bindings/Python/IRCore.cpp index 39757dfad5be..2ce640674245 100644 --- a/mlir/lib/Bindings/Python/IRCore.cpp +++ b/mlir/lib/Bindings/Python/IRCore.cpp @@ -3071,6 +3071,11 @@ void mlir::python::populateIRCore(py::module &m) { py::arg("successors") = py::none(), py::arg("regions") = 0, py::arg("loc") = py::none(), py::arg("ip") = py::none(), py::arg("infer_type") = false, kOperationCreateDocstring) + .def("_get_first_in_block", [](PyOperation &self) -> MlirOperation { + MlirBlock block = mlirOperationGetBlock(self.get()); + MlirOperation first = mlirBlockGetFirstOperation(block); + return first; + }) .def_static( "parse", [](const std::string &sourceStr, const std::string &sourceName, diff --git a/mlir/test/python/ir/operation.py b/mlir/test/python/ir/operation.py index f59b1a26ba48..6b12b8da5c24 100644 --- a/mlir/test/python/ir/operation.py +++ b/mlir/test/python/ir/operation.py @@ -24,6 +24,25 @@ def expect_index_error(callback): except IndexError: pass +@run +def testCustomBind(): + ctx = Context() + ctx.allow_unregistered_dialects = True + module = Module.parse( + r""" + func.func @f1(%arg0: i32) -> i32 { + %1 = "custom.addi"(%arg0, %arg0) : (i32, i32) -> i32 + return %1 : i32 + } + """, + ctx, + ) + add = module.body.operations[0].regions[0].blocks[0].operations[0] + op = add.operation + # This will get a reference to itself. + f1 = op._get_first_in_block() + + # Verify iterator based traversal of the op/region/block hierarchy. # CHECK-LABEL: TEST: testTraverseOpRegionBlockIterators ```
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Ethan Luis McDonough authored
This patch addresses an issue introduced in pull request #74398. CMake will attempt to re-build gtest if openmp is enabled as a project (as opposed to being enabled as a runtime). This patch adds a check that prevents this from happening.
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