llvm-svn: 286085

Cmake has not recognized that Hexagon.td has a new dependency in
HexagonPatterns.td. All changes to that file were not visible to
the build bots.

llvm-svn: 286084

llvm-svn: 286083

This handles the last case of the builtin function calls that we would
generate code which differed from Microsoft's ABI.  Rather than
generating a call to `__pow{d,s}i2` we now promote the parameter to a
float or double and invoke `powf` or `pow` instead.

Addresses PR30825!

llvm-svn: 286082

llvm-svn: 286081

The clr/set/toggle-bit instructions (with the bit index given as an
immediate operand) had both, custom selection code that generated them,
and selection patterns at the same time. The selection patterns were
not used, because the custom selection code was executed first.
This patch removes the custom code in favor of the selection patterns.
The custom code handled 64-bit registers as well with an immediate bit
index, and so new patterns were added to implement that.

It was also the same case for the instruction "Rd += asr(Rs, Rt)",
except that the custom code did not offer any additional functionality,
and was simply removed.

llvm-svn: 286080

Remove unnecessary type casts in patterns.

llvm-svn: 286079

Give simpler or more meaningful names to pat frags and xforms.

llvm-svn: 286078

Remove unnecessary C++ functions for SDNode transforms. Move more
pat frags to files where they are used.

llvm-svn: 286077

Add pat frags for any-, sign-, and zero-extensions.

llvm-svn: 286076

llvm-svn: 286075

In preparation for demandedelts support

llvm-svn: 286074

[AVX-512] Remove intrinsics for 128/256-bit masked variable shift. Instead upgrade them to a select and the older AVX2 intrinsic.

llvm-svn: 286073

[AVX-512] Remove intrinsics for 128/256-bit masked shift by immediate. Instead upgrade them to a select and the older SSE/AVX2 intrinsic.

llvm-svn: 286072

llvm-svn: 286071

[AVX-512] Remove intrinsics for 128/256-bit masked shift by single element in xmm. Instead upgrade them to a select and the older SSE/AVX2 intrinsic.

llvm-svn: 286070

[AVX-512] Remove a 512-bit test cases from the avx512vl test file. It already exists in the avx512f test file.

llvm-svn: 286069

In preparation for demandedelts support

llvm-svn: 286068

Don't regenerate a zeroable element mask with computeZeroableShuffleElements when its already available.

llvm-svn: 286067

No functional change intended.

llvm-svn: 286066

This fixes casting warning and removes the need of that cast at all.

llvm-svn: 286065

llvm-svn: 286064

[X86] Add a few more fptoui test cases to the vec_fp_to_int.ll. The codegen for these test cases will be improved for AVX512 in a future commit.

llvm-svn: 286063

Summary:
This kill various depreacated API related to attribute :
 - The deprecated C API attribute based on LLVMAttribute enum.
 - The Raw attribute set format (planned to be removed in 4.0).

Reviewers: bkramer, echristo, mehdi_amini, void

Subscribers: mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D23039

llvm-svn: 286062

Patch switches computing of --build-id hash to tree.

This is the way when input data is splitted by chunks,
hash is computed for each one in threaded/non-threaded way.
At the end hash is conputed for result tree.

With or without -threads the result hash is the same.

Differential revision: https://reviews.llvm.org/D26199

llvm-svn: 286061

Summary:
Fixes PR30869.

In D25977 I meant to change all functions that care about lifetime. I
changed constructors, factory functions, but I missed member/free
functions that return new instances. This patch changes them.

Reviewers: hfinkel, kbarton, echristo, joerg

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D26269

llvm-svn: 286060

llvm-svn: 286059

[AVX-512] Add avx512vl command line to the fpext test and add -show-mc-encoding to show where we aren't using EVEX instructions.

llvm-svn: 286058

[AVX-512] Lower AVX cvtpd2ps intrinsic to ISD::FP_ROUND so it can use EVEX instruction when available.

llvm-svn: 286057

[AVX-512] Lower SSE/AVX cvtdq2ps intrinsics directly to ISD::SINT_TO_FP so they can use EVEX instructions when available.

llvm-svn: 286056

[AVX-512] Add -show-mc-encoding to legacy vector intrinsic tests so we can see when VEX or EVEX encoded instructions are being emitted. Make sure the tests all have an avx2 command line and an skx command line.

llvm-svn: 286055

llvm-svn: 286054

A CommonInputSection is a section containing all common symbols.
That was an input section but was abstracted in a different way
than the synthetic input sections because it was written before
the synthetic input section was invented.

This patch rewrites CommonInputSection as a synthetic input section
so that it behaves better with other sections.

llvm-svn: 286053

In short the patch introduces support for linking object file conform
MIPS N32 ABI [1]. This ABI is similar to N64 ABI but uses 32-bit
pointer size.

The most non-trivial requirement of this ABI is one more relocation
packing format. N64 ABI puts multiple relocation type into the single
relocation record. The N32 ABI uses series of successive relocations
with the same offset for this purpose. In this patch, new function
`mergeMipsN32RelTypes` handle this case and "convert" N32 relocation to
the N64 relocation so the rest of the code keep unchanged.

For now, linker does not support series of relocations applied to sections
without SHF_ALLOC bit. Probably later I will add the support or insert
some sort of assert into the `relocateNonAlloc` routine to catch this
case.

[1] ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/MIPS-N32-ABI-Handbook.pdf

Differential revision: https://reviews.llvm.org/D26298

llvm-svn: 286052

Previously, we do this piece of code to iterate over all input sections.

  for (elf::ObjectFile<ELFT> *F : Symtab.getObjectFiles())
    for (InputSectionBase<ELFT> *S : F->getSections())

It turned out that this mechanisms doesn't work well with synthetic
input sections because synthetic input sections don't belong to any
input file.

This patch defines a vector that contains all input sections including
synthetic ones.

llvm-svn: 286051

Add some additional asserts that ensure newly code-generated memory accesses
are defined on all domain and schedule domain instances.

llvm-svn: 286050

llvm-svn: 286049

Consistently use register class pat frags instead of spelling out
the type and class each time.

llvm-svn: 286048

Add asserts that verify that the memory accesses of a new copy statement
are defined for all domain instances the copy statement is defined for.

llvm-svn: 286047

llvm-svn: 286046