- Jul 30, 2020
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George Mitenkov authored
This is the first patch that adds support for GLSL extended instruction set ops. These are direct conversions, apart from `spv.Tan` that is lowered to `sin() / cos()`. Reviewed By: antiagainst Differential Revision: https://reviews.llvm.org/D84627
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Haojian Wu authored
The assertion is not true anymore after D82739, this patch just removes it, and rename related functions. And also fixes a missing cases. Differential Revision: https://reviews.llvm.org/D84837
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Craig Topper authored
Continue the change made to ParseATTOperand to take the vector by reference. Let ParseMemOperand add its memory operand to the vector and just return true/false to indicate error.
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Craig Topper authored
Pointers and SMLocs are cheap to copy. Even though the function modifies some of these the caller doesn't use them after the call.
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Serge Pavlov authored
This change define RAII class `FileLocker` and methods `lock` and `tryLockFor` of the class `raw_fd_stream` to facilitate using file locks. Differential Revision: https://reviews.llvm.org/D79066
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Max Kazantsev authored
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Balázs Kéri authored
Use of BuiltinBug is replaced by BugType. Class BuiltinBug seems to have no benefits and is confusing. Reviewed By: Szelethus, martong, NoQ, vsavchenko Differential Revision: https://reviews.llvm.org/D84494
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Tony authored
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Tony authored
- Clarify that these are extensions to DWARF 5 and not as yet a proposal. Reviewed By: scott.linder Differential Revision: https://reviews.llvm.org/D70523
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Craig Topper authored
[X86] Teach the assembler parser to handle a '*' between segment register and base/index/displacement part of an address A '*' after the segment is equivalent to a '*' before the segment register. To make the AsmMatcher table work we need to place the '*' token into the operand vector before the full memory operand. To accomplish this I've modified some portions of operand parsing to expose the operand vector to ParseATTOperand so that the token can be pushed to the vector after parsing the segment register and before creating the memory operand using that segment register. Fixes PR46879 Reviewed By: MaskRay Differential Revision: https://reviews.llvm.org/D84895
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Amy Huang authored
Previously ctor homing was omitting debug info for classes if they have both trival and nontrivial constructors, but we should only omit debug info if the class doesn't have any trivial constructors. retained types list. bug: https://bugs.llvm.org/show_bug.cgi?id=46537 Differential Revision: https://reviews.llvm.org/D84870
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Yuanfang Chen authored
z13 is not a target. It is a CPU.
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Yuanfang Chen authored
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Yuanfang Chen authored
--string-dump
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Kang Zhang authored
Summary: Some instructions have set the wrong [RM] flag, this patch is to fix it. Instructions x(v|s)r(d|s)pi[zmp]? and fri[npzm] use fixed rounding directions without referencing current rounding mode. Also, the SETRNDi, SETRND, BCLRn, MTFSFI, MTFSB0, MTFSB1, MTFSFb, MTFSFI, MTFSFI_rec, MTFSF, MTFSF_rec should also fix the RM flag. Reviewed By: jsji Differential Revision: https://reviews.llvm.org/D81360
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Tony authored
- Clarify what context is used in DWARF expression evaluation. - Define location descriptions to fully resolve the context and so include the context in their result. - As a consequence of location descriptions being fully resoved, change address spaces so only a swizzled and unswizzled private address space is defined. The lane is now part of the location description context. - Clarify how call frame information is used to fully resolve expressions that specify registers. Reviewed By: scott.linder Differential Revision: https://reviews.llvm.org/D70523
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Matt Arsenault authored
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Matt Arsenault authored
SelectionDAGBuilder just drops these, so do the same.
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Jonas Devlieghere authored
Move the finish_swig logic into a function in the bindings directory. By making this a function I can reuse the logic internally where we ship two Python versions and therefore need to finish the bindings twice.
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Richard Smith authored
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Juneyoung Lee authored
This patch makes JumpThreading fold br(freeze(undef)) if the freeze instruction is only used by the branch. Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D84818
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Vedant Kumar authored
Fixes a build failure in the Darwin kernel. Tested with: % nm -m ./lib/libclang_rt.cc_kext_x86_64_osx.a | grep lprofSetProfileDumped rdar://66249602
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Julian Lettner authored
Add a fallback for `sysctl kern.osproductversion` for XNU 17 (macOS 10.13) and below, which do not provide this property. Unfortunately, this means we have to take the detour via Darwin kernel version again (at least for the fallback). Reviewed By: delcypher Differential Revision: https://reviews.llvm.org/D84892
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Matt Arsenault authored
I still think it's highly questionable that we have two intrinsics with identical behavior and only vary by the name of the libcall used if it happens to be lowered that way, but try to reduce the feature delta between SDAG and GlobalISel for recently added intrinsics. I'm not sure which opcode should be considered the canonical one, but lower roundeven back to round.
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Mircea Trofin authored
Further abstracting the specification of a tensor, to more easily support different types and shapes of tensor, and also to perform initialization up-front, at TFModelEvaluator construction time. Differential Revision: https://reviews.llvm.org/D84685
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Matt Morehouse authored
Its implementation was scrapped in the final fast16labels instrumentation patch.
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Francis Visoiu Mistrih authored
This reverts commit d8e8e32d. This breaks the build on GreenDragon: http://green.lab.llvm.org/green/job/clang-stage1-RA/13171/console
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Jonas Devlieghere authored
LLVM's make_paths_relative uses Python3_EXECUTABLE which isn't set in standalone LLDB builds.
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Alex Lorenz authored
for device simulators This change separates out the iOS/tvOS/watchOS simulator slices from the "libclang_rt.<os>.a" fat archive, by moving them out to their own "libclang_rt.<os>sim.a" static archive. This allows us to build and to link with an arm64 device simulator slice for the simulators running on Apple Silicons, and to distribute it in one archive alongside the Intel simulator slices. Differential Revision: https://reviews.llvm.org/D84564
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Hiroshi Yamauchi authored
This reverts commit 120e66b3. Due to a buildbot failure.
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shafik authored
We saw a crash recently (rdar://problem/65276489) that looks related to an invalid ValueObjectSP in a summary providers in Cocoa.cpp e.g. NSBundleSummaryProvider(...). This adds checks before we use them usually by calling NSStringSummaryProvider. Differential Revision: https://reviews.llvm.org/D84272
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Craig Topper authored
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Arthur Eubanks authored
From https://reviews.llvm.org/D84872.
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Sanjay Patel authored
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Sanjay Patel authored
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Saleem Abdulrasool authored
When attempting to build compiler-rt on a developer transition kit, the build would fail due to `.S` files not being handled properly by the Ninja generator. Rather than conditionalising on Xcode, conditionalise to Darwin. Because we know that the system compiler is clang based, it will always properly handle the pre-processing based on the extension. Differential Revision: https://reviews.llvm.org/D84333
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Hiroshi Yamauchi authored
To avoid hash collisions when the only difference is in mem ops. Differential Revision: https://reviews.llvm.org/D84782
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Arthur Eubanks authored
This reduces the number of check-llvm failures by 500. Ideally we'd have a codegen version of PassRegistry.def, or have all the codegen passes ported and put into PassRegistry.def. But since that doesn't exist yet, hardcode the list of codegen IR passes. There are still codegen passes missing from this list, I'll add them later as I stumble upon them. Reviewed By: asbirlea, ychen Differential Revision: https://reviews.llvm.org/D84872
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Johannes Doerfert authored
The problem with 8723280b was that the `dso_local` is *before* the void not after. Hope this works.
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cgyurgyik authored
Reviewed By: sivachandra Differential Revision: https://reviews.llvm.org/D84611
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