Context: The `expression` command uses artificial variables to store the expression
result. This result variable is unconditionally kept around after the expression command
has completed. These variables are known as persistent results. These are the variables
`$0`, `$1`, etc, that are displayed when running `p` or `expression`.

This change allows users to control whether result variables are persisted, by
introducing a `--persistent-result` flag.

This change keeps the current default behavior, persistent results are created by
default. This change gives users the ability to opt-out by re-aliasing `p`. For example:

```
command unalias p
command alias p expression --persistent-result false --
```

For consistency, this flag is also adopted by `dwim-print`. Of note, if asked,
`dwim-print` will create a persistent result even for frame variables.

Differential Revision: https://reviews.llvm.org/D144230

Adopt `expression`'s options in `dwim-print`.

This is primarily added to support the `--language`/`-l` flag.

Differential Revision: https://reviews.llvm.org/D144114

This reverts commit b861b122.
This reverts commit 4be17641.

This patch wont build on some compilers on buildbot.

    [TextAPI] Implement TBDv5 Reader

    Introduce initial reader for TBDv5 which is in JSON. This captures all
    the currently understood fields within the internal structure
    `InterfaceFile`.

    New fields & follow up tests will be followed up in future PRs.

Reviewed By: pete

Differential Revision: https://reviews.llvm.org/D144156

Differential Revision: https://reviews.llvm.org/D144303

[Clang] Fix __VA_OPT__ implementation so that it treats the concatenation of a non-placemaker token and placemaker token as a non-placemaker token

Currently the implementation of __VA_OPT__ will treat the concatenation of a
non-placemaker token and placemaker token as a placemaker token which is not
correct. This will fix the implementation and treat the result as a
non-placemaker token.

This fixes: https://github.com/llvm/llvm-project/issues/60268

Differential Revision: https://reviews.llvm.org/D142604

Rather than using operator[] on getFeatureBits we can use
hasFeature to shorten the code.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D144300

This reverts commit 4eadd19c.

Doesn't work on macos. I'll investigate more

Since binary ID lookup makes CLI object arguments optional, it should be
possible to pass a list of source files without a binary. Unfortunately,
the current syntax will always interpret the first source file as a
binary. This change adds a `-sources` option to cause all later
positional arguments to be considered sources.

Reviewed By: gulfem

Differential Revision: https://reviews.llvm.org/D144207

Differential Revision: https://reviews.llvm.org/D144287

Reviewed By: Mordante, #libc

Spies: libcxx-commits

Differential Revision: https://reviews.llvm.org/D144258

The XTHeadBb extension hab both signed and unsigned bitfield
extraction instructions (TH.EXT and TH.EXTU, respectively) which have
previously only been supported for sign extension on byte, halfword,
and word-boundaries.

This adds the infrastructure to use TH.EXT and TH.EXTU for arbitrary
bitfield extraction.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D144229

In json::Value, getAsInteger returns an optional<int64_t> and getAsNumber
returns an optional<double>. If a value is larger than what an int64_t
can hold but smaller than what a uint64_t can hold, the getAsInteger
function will fail but the getAsNumber will succeed. However, the value
shouldn't be interpreted as a double.

rdar://105556974

Differential Revision: https://reviews.llvm.org/D144238

  LWG3810 CTAD for std::basic_format_args

Reviewed By: #libc, philnik

Differential Revision: https://reviews.llvm.org/D144275

Also get rid of explicitly specified '-march' values for old architectures.
This simplifies %ptxas-verify statements.
After the change, we can potentially miss cases where a new functionality
is added to the architecture without appropriate checks in the
backend. On the other hand, this is mostly true for old architectures
that have been thoroughly tested.

Differential Revision: https://reviews.llvm.org/D141736

The goal is to fuzz the entirety of printf, but the plan is to do it in
pieces for simplicity. This test fuzzes just the parser, while later
tests will fuzz the converters. This also adds a mock version of the
arg_list class.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D143784

For testing purposes we need to be able to mock out the ArgList class.
This patch adds a mock version of that class as well as a flag to enable
it.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D144145

Do not create an Affine ops for expanded size because the affine op is
too complicated which would hit an assertion in affine ops
simplification.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D144151

Internally we store constants in int64_t after parsing, but this is
kind of an implementation detail. If we only supported rv32, we might
have chosen int32_t.

For rv32, I think it makes sense to accept the constants that we
would accept if int32_t was the internal type. In fact we already
do this for the `li` alias. This patch extends this to sign
extended constants for other instructions.

This matches the GNU assembler. The difference between LLVM and gcc
was previously noted here. https://github.com/riscv-non-isa/riscv-asm-manual/pull/71

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D144166

This reverts commit 20cc23c7.

This reverts commit d2918544.

The instructions in the XTHeadMac extension (multiply accumulate
instructions) were marked as commutative but because the destination
register was also an input (accumulate) register and was connected to
the destination register with a register allocator constraint, all
three operands (instead of two) were incorrectly considered
commutative. To fix that an appropriate fixCommutedOpIndices call was
added for these instructions in findCommutedOpIndices

New test functions have been added to test the correct behaviour in
xtheadmac.ll.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D144278

The RISC-V backend thus far does not provide strength-reduction, which
causes a long (but not complete) list of 3-instruction patterns listed
to utilize the shift-and-add instruction from Zba and XTHeadBa in
strength-reduction.

This adds the logic to perform strength-reduction through the DAG
combine for ISD::MUL.  Initially, we wire this up for XTheadBa only,
until this has had some time to settle and get real-world test
exposure.

The following strength-reductions strategies are currently supported:
  - XTheadBa
    - C = (n + 1)           // th.addsl
    - C = (n + 1)k          // th.addsl, slli
    - C = (n + 1)(m + 1)    // th.addsl, th.addsl
    - C = (n + 1)(m + 1)k   // th.addsl, th.addsl, slli
    - C = ((n + 1)m + 1)    // th.addsl, th.addsl
    - C = ((n + 1)m + 1)k   // th.addslm th.addsl, slli
  - base ISA
    - C being 2 set-bits    // slli, slli, add
			       (possibly slli, th.addsl)

Even though the slli+slli+add sequence would we supported without
XTheadBa, this currently is gated to avoid having to update a large
number of test cases (i.e., anything that has a multiplication with a
constant where only 2 bits are set) in this commit.

With the strength reduction now being performed in performMUL combine,
we drop the (now redundant) patterns from RISCVInstrInfoXTHead.td.

Depends on D143029

Differential Revision: https://reviews.llvm.org/D143394

The vendor-defined XTHeadMemPair (no comparable standard extension exists
at the time of writing) extension adds two-GPR load/store pair instructions.

It is supported by the C9xx cores (e.g., found in the wild in the
Allwinner D1) by Alibaba T-Head.

The current (as of this commit) public documentation for this
extension is available at:
  https://github.com/T-head-Semi/thead-extension-spec/releases/download/2.2.2/xthead-2023-01-30-2.2.2.pdf

Support for these instructions has already landed in GNU Binutils:
  https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=6e17ae625570ff8f3c12c8765b8d45d4db8694bd

Depends on D143847

Differential Revision: https://reviews.llvm.org/D144002

Recommit by preames with commit message, various style cleanups, and unaddressed review comments corrected.

This patch implements experimental codegen support for the RISCV Zfa extension as specified here: https://github.com/riscv/riscv-isa-manual/releases/download/draft-20221119-5234c63/riscv-spec.pdf, Ch. 25. This extension has not been ratified.

This change does not include support for FLI (upcoming in a follow up change) or FCVTMOD (not relevant for C/C++).

Differential Revision: https://reviews.llvm.org/D143982

This patch fixes:

  llvm/lib/IR/Instruction.cpp:141:20: warning: unused variable ‘CB’ [-Wunused-variable]

This patch reintroduces an API to create operations with a pre-existing
DictionaryAttr. This API does not populate the attributes with any
default attributes the operation may have, like the API that takes a
NamedAttrList does. NamedAttrList is effective at not re-hashing the
attributes if no default attributes were added, but this new API speeds
up clone-heavy workloads slightly (~5%).

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D144204

These methods won't assert for release build.

[RISCV] Improve isInterleaveShuffle to handle interleaving the high half and low half of the same source.

This is needed to support the new interleave intrinsics from D141924 for
fixed vectors.

I've reworked the core loop to operate in terms of half of a source. Making 4
possible half sources. The first element of the half is used to indicate which
source using the same numbering as the shuffle where the second source elements
are numbered after the first source.

I've added restrictions to only match the first half of two vectors or the
first and second half of a single vector. This was done to prevent regressions
on the cases we have coverage for. I saw cases where generic DAG combine split
a single interleave into 2 smaller interleaves a concat. We can revisit in the
future.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D144143

The gABI prohibits multiple SH_SYMTAB sections. As a result,
llvm-objcopy was crashing in SymbolTableSection::removeSymbols(). This
patch fixes the issue by emitting an error if multiple SH_SYMTAB
sections are encountered when building an ELF object.

Fixes: https://github.com/llvm/llvm-project/issues/60448

Differential Revision: https://reviews.llvm.org/D143508

Differential Revision: https://reviews.llvm.org/D143545

This reverts commit d73eb92c.

Breaks win/mac, e.g. http://45.33.8.238/win/75236/step_4.txt

Reviewed By: #libc, ldionne

Differential Revision: https://reviews.llvm.org/D143393