Remove --cuda-path=CUDA_TOOLKIT_ROOT_DIR-NOTFOUND
from the invocation of non-nvptx test cases. Better signal
to noise ratio on other architectures.

Reviewed By: tianshilei1992

Differential Revision: https://reviews.llvm.org/D107074

Multiple copies of emulated TLS state means inconsistent results when
accessing the same thread-local variable from different shared objects
(https://github.com/android/ndk/issues/1551). Making `__emutls_get_address`
be a weak default visibility symbol should make the dynamic linker
ensure only a single copy gets used at runtime. This is best-effort, but
the more robust approach of putting emulated TLS into its own shared
object would (a) be a much bigger change, and (b) shared objects are
pretty heavyweight, and adding a new one to a space-constrained
environment isn't an easy sell. Given the expected rarity of direct
accesses to emulated TLS variables across different shared objects, the
best-effort approach should suffice.

Reviewed By: danalbert, rprichard

Differential Revision: https://reviews.llvm.org/D107127

This reverts commit 89d6eb6f, this
seemed to have break a few builders.

This reverts commit 84705ed9.

Additional asserts were added to ScalarEvolution to enforce
pointer/int type rules. An assert is triggered when the LSR pass
attempts to extend a pointer SCEV in GenerateTruncates.

This patch changes GenerateTruncates to exit early if the Formaula
contains a ScaledReg or BaseReg with a pointer type.

Differential Revision: https://reviews.llvm.org/D107185

This change makes sure that DwarfUnit does not load a .dwo file until
necessary. I also take advantage of DWARF 5's guarantee that the first
support file is also the primary file to make it possible to create
a compile unit without loading the .dwo file.

Review By: jankratochvil, dblaikie

Differential Revision: https://reviews.llvm.org/D100299

Broke nvptx compilation on files including <complex>

This reverts commit 12da97ea.

Primarily, configure substitutions so we can copy-paste the "RUN" line
of failed tests without worrying about the paths.

This fixes support for merging profiles which broke as a consequence
of e50a3884. The issue was missing
adjustment in merge logic to account for the binary IDs which are
now included in the raw profile just after header.

In addition, this change also:
* Includes the version in module signature that's used for merging
to avoid accidental attempts to merge incompatible profiles.
* Moves the binary IDs size field after version field in the header
as was suggested in the review.

Differential Revision: https://reviews.llvm.org/D107143

Differential Revision: https://reviews.llvm.org/D107052

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D107191

Update ARMGetSupportedArchitectureAtIndex to consider remote macOS
debugging. Currently, it defaults to an iOS triple when IsHost() returns
false. This fixes TestPlatformSDK.py on Apple Silicon.

Differential revision: https://reviews.llvm.org/D107179

Make DefaultAlignForAttributeAligned consistent with SystemZ.

Reviewed By: abhina.sreeskantharajan, anirudhp

Differential Revision: https://reviews.llvm.org/D107189

The builtins vec_xl_len_r and vec_xst_len_r actually use the
wrong side of the vector on big endian Power9 systems. We never
spotted this before because there was no such thing as a big
endian distro that supported Power9. Now we have AIX and the
elements are in the wrong part of the vector. This just fixes
it so the elements are loaded to and stored from the right
side of the vector.

Added examples to G_BR, G_BRCOND, G_BRJT, G_BRINDIRECT

Differential Revision: https://reviews.llvm.org/D104974

This prevents from confusion with the ``labels`` option.

Reviewed By: snehasish

Differential Revision: https://reviews.llvm.org/D107128

Differential Revision: https://reviews.llvm.org/D99364

Change `CountersPtr` in `__profd_` to a label difference, which is a link-time
constant. On ELF, when linking a shared object, this requires that `__profc_` is
either private or linkonce/linkonce_odr hidden. On COFF, we need D104564 so that
`.quad a-b` (64-bit label difference) can lower to a 32-bit PC-relative relocation.

```
# ELF: R_X86_64_PC64 (PC-relative)
.quad .L__profc_foo-.L__profd_foo

# Mach-O: a pair of 8-byte X86_64_RELOC_UNSIGNED and X86_64_RELOC_SUBTRACTOR
.quad l___profc_foo-l___profd_foo

# COFF: we actually use IMAGE_REL_AMD64_REL32/IMAGE_REL_ARM64_REL32 so
# the high 32-bit value is zero even if .L__profc_foo < .L__profd_foo
# As compensation, we truncate CountersDelta in the header so that
# __llvm_profile_merge_from_buffer and llvm-profdata reader keep working.
.quad .L__profc_foo-.L__profd_foo
```

(Note: link.exe sorts `.lprfc` before `.lprfd` even if the object writer
has `.lprfd` before `.lprfc`, so we cannot work around by reordering
`.lprfc` and `.lprfd`.)

With this change, a stage 2 (`-DLLVM_TARGETS_TO_BUILD=X86 -DLLVM_BUILD_INSTRUMENTED=IR`)
`ld -pie` linked clang is 1.74% smaller due to fewer R_X86_64_RELATIVE relocations.
```
% readelf -r pie | awk '$3~/R.*/{s[$3]++} END {for (k in s) print k, s[k]}'
R_X86_64_JUMP_SLO 331
R_X86_64_TPOFF64 2
R_X86_64_RELATIVE 476059  # was: 607712
R_X86_64_64 2616
R_X86_64_GLOB_DAT 31
```

The absolute function address (used by llvm-profdata to collect indirect call
targets) can be converted to relative as well, but is not done in this patch.

Differential Revision: https://reviews.llvm.org/D104556

This distributes reductions based on the relative offset of loads, if
one is found from their operands. Given chains of reductions this will
then sort them in ascending load order, which in turn can help simple
prefetches latch on to increasing strides more easily.

Differential Revision: https://reviews.llvm.org/D106569

Reviewed By: Anastasia

Differential Revision: https://reviews.llvm.org/D107176

D107170

This allows for hwasan to be built targetting fuchsia.

Differential Revision: https://reviews.llvm.org/D103543

These functions should not be externally used. We also do not need them internally for Fuchsia.

Differential Revision: https://reviews.llvm.org/D99381

@tcanens pointed out the current behavior of the macro breaks the usage
pattern described in http://wg21.link/SD6
```
#  if __has_include(<optional>)
#    include <optional>
#    if __cpp_lib_optional >= 201606
#      define have_optional 1
#    endif
```

To support this usage pattern the hard errror is removed. Instead the
header includes nothing but the `<version>` header.

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D107134

Ok should be true at this point, so the early-out is dead - replace with an assert.

Match style and don't use an else after a return.

Fixes coverity warning - we have an early-out for unsigned depth == 0, so the depth < 1 early-out later on is dead code.

Rationale:
External file formats always store the values as doubles, so this was
hard coded in the memory resident COO scheme used to pass data into the
final sparse storage scheme during setup. However, with alternative methods
on the horizon of setting up these temporary COO schemes, it is time to
properly template this data structure.

Reviewed By: gussmith23

Differential Revision: https://reviews.llvm.org/D107001

Always codesign binaries on macOS. Apple Silicon has stricter
codesigning requirements, for example requiring macCatalyst binaries to
be signed. Ad-hoc sign everything like we do for other Darwin platforms.

When using `-DLLVM_ENABLED_RUNTIMES` instead of `-DLLVM_ENABLED_PROJECTS`
the `llvm-omp-device-info` tool is not compiled or installed.
In general, no llvm tool would be build on runtimes, because the
-DLLVM_BUILD_TOOLS flag is removed by the way runtimes compilation calls
cmake again.

This patch is simple. Just forward the value of this flag to the
runtime cmake command.

I'm also removing an unnecessary comment in the compilation of the tool

Differential Revision: https://reviews.llvm.org/D107177

@jingham correctly pointed out that this call can be simplified. So
let's better do it.

Differential Revision: https://reviews.llvm.org/D106840

Don't try to run the non-integrated assembler; just verify that the
invocations look like what we expect.  Do verify that the integrated
assembler handles warnings as expected.

In mixed mode builds, we should not be including errno as part of
LLVM libc - errno from another library (or the system library) should be
used. But, other entrypoints which use errno list LLVM libc's errno as a
dep ta satisfy the full build mode. So, we add a dummy errno
implementation with empty files to make both mixed mode and full build
mode happy.

This could be smarter by picking an ideal type, or at least splitting
the vector in half first. Also handles lower for non-power-of-2,
non-extending vector loads.

Currently this just avoids failing to legalize some odd vector AMDGPU
tests, but is a step towards removing the split logic from the
NarrowScalar logic.

Replace insertelement instructions for splats with just single
insertelement + broadcast shuffle. Also, try to merge these instructions
if they come from the same/shuffled gather node.

Differential Revision: https://reviews.llvm.org/D107104

If a reduction Phi has a single user which `AND`s the Phi with a type mask,
`lookThroughAnd` will return the user of the Phi and the narrower type represented
by the mask. Currently this is only used for arithmetic reductions, whereas loops
containing logical reductions will create a reduction intrinsic using the widened
type, for example:

  for.body:
    %phi = phi i32 [ %and, %for.body ], [ 255, %entry ]
    %mask = and i32 %phi, 255
    %gep = getelementptr inbounds i8, i8* %ptr, i32 %iv
    %load = load i8, i8* %gep
    %ext = zext i8 %load to i32
    %and = and i32 %mask, %ext
    ...

^ this will generate an and reduction intrinsic such as the following:
    call i32 @llvm.vector.reduce.and.v8i32(<8 x i32>...)

The same example for an add instruction would create an intrinsic of type i8:
    call i8 @llvm.vector.reduce.add.v8i8(<8 x i8>...)

This patch changes AddReductionVar to call lookThroughAnd for other integer
reductions, allowing loops similar to the example above with reductions such
as and, or & xor to vectorize.

Reviewed By: david-arm, dmgreen

Differential Revision: https://reviews.llvm.org/D105632

The code for splitting an unaligned access into 2 pieces is
essentially the same as for splitting a non-power-of-2 load for
scalars. It would be better to pick an optimal memory access size and
directly use it, but splitting in half is what the DAG does.

As-is this fixes handling of some unaligned sextload/zextloads for
AMDGPU. In the future this will help drop the ugly abuse of
narrowScalar to handle splitting unaligned accesses.