1. Dec 09, 2019
    • David Stenberg's avatar
      [DebugInfo] Make describeLoadedValue() reg aware · 3cd93a4e
      David Stenberg authored
      Currently the describeLoadedValue() hook is assumed to describe the
      value of the instruction's first explicit define. The hook will not be
      called for instructions with more than one explicit define.
      
      This commit adds a register parameter to the describeLoadedValue() hook,
      and invokes the hook for all registers in the worklist.
      
      This will allow us to for example describe instructions which produce
      more than two parameters' values; e.g. Hexagon's various combine
      instructions.
      
      This also fixes a case in our downstream target where we may pass
      smaller parameters in the high part of a register. If such a parameter's
      value is produced by a larger copy instruction, we can't describe the
      call site value using the super-register, and we instead need to know
      which sub-register that should be used.
      
      This also allows us to handle cases like this:
      
        $ebx = [...]
        $rdi = MOVSX64rr32 $ebx
        $esi = MOV32rr $edi
        CALL64pcrel32 @call
      
      The hook will first be invoked for the MOV32rr instruction, which will
      say that @call's second parameter (passed in $esi) is described by $edi.
      As $edi is not preserved it will be added to the worklist. When we get
      to the MOVSX64rr32 instruction, we need to describe two values; the
      sign-extended value of $ebx -> $rdi for the first parameter, and $ebx ->
      $edi for the second parameter, which is now possible.
      
      This commit modifies the dbgcall-site-lea-interpretation.mir test case.
      In the test case, the values of some 32-bit parameters were produced
      with LEA64r. Perhaps we can in general cases handle such by emitting
      expressions that AND out the lower 32-bits, but I have not been able to
      land in a case where a LEA64r is used for a 32-bit parameter instead of
      LEA64_32 from C code.
      
      I have not found a case where it would be useful to describe parameters
      using implicit defines, so in this patch the hook is still only invoked
      for explicit defines of forwarding registers.
      3cd93a4e
    • Calixte Denizet's avatar
      [compiler-rt] Add a critical section when flushing gcov counters · 88f5bf77
      Calixte Denizet authored
      Summary:
      Counters can be flushed in a multi-threaded context for example when the process is forked in different threads (https://github.com/llvm/llvm-project/blob/master/llvm/lib/Transforms/Instrumentation/GCOVProfiling.cpp#L632-L663).
      In order to avoid pretty bad things, a critical section is needed around the flush.
      We had a lot of crashes in this code in Firefox CI when we switched to clang for linux ccov builds and those crashes disappeared with this patch.
      
      Reviewers: marco-c, froydnj, dmajor, davidxl
      
      Reviewed By: marco-c, dmajor
      
      Subscribers: froydnj, dmajor, dberris, jfb, #sanitizers, llvm-commits, sylvestre.ledru
      
      Tags: #sanitizers, #llvm
      
      Differential Revision: https://reviews.llvm.org/D70910
      88f5bf77
    • Raphael Isemann's avatar
      [lldb] Add a test for how we lazily create Clang AST nodes · f6e05672
      Raphael Isemann authored
      Summary:
      One of the ways we try to make LLDB faster is by only creating the Clang declarations (and loading the associated types)
      when we actually need them for something. For example an evaluated expression might need to load types to
      type check and codegen the expression.
      
      Currently this mechanism isn't really tested, so we currently have no way to know how many Clang nodes we load and
      when we load them. In general there seems to be some confusion when and why certain Clang nodes are created.
      As we are about to make some changes to the code which is creating Clang AST nodes we probably should have
      a test that at least checks that the current behaviour doesn't change. It also serves as some kind of documentation
      on the current behaviour.
      
      The test in this patch is just evaluating some expressions and checks which Clang nodes are created due to this in the
      module AST. The check happens by looking at the AST dump of the current module and then scanning it for the
      declarations we are looking for.
      
      I'm aware that there are things missing in this test (inheritance, template parameters, non-expression evaluation commands)
      but I'll expand it in follow up patches.
      
      Also this test found two potential bugs in LLDB which are documented near the respective asserts in the test:
      
      1. LLDB seems to always load all types of local variables even when we don't reference them in the expression. We had patches
      that tried to prevent this but it seems that didn't work as well as it should have (even though we don't complete these
      types).
      2. We always seem to complete the first field of any record we run into. This has the funny side effect that LLDB is faster when
      all classes in a project have an arbitrary `char unused;` as their first member. We probably want to fix this.
      
      Reviewers: shafik
      
      Subscribers: abidh, JDevlieghere, lldb-commits
      
      Tags: #lldb
      
      Differential Revision: https://reviews.llvm.org/D71056
      f6e05672
    • Hans Wennborg's avatar
      Revert 393dacac "[ARM] Enable TypePromotion by default" · a3839693
      Hans Wennborg authored
      This caused "Too many bits for uint64_t" asserts when building Chromium. See
      https://crbug.com/1031978#c2 for a reproducer. I'll follow up on the
      llvm-commits thread with a creduced version.
      
      > ARMCodeGenPrepare has already been generalized and renamed to
      > TypePromotion. We've had it enabled and tested downstream for a
      > while, so enable it by default.
      >
      > Differential Revision: https://reviews.llvm.org/D70998
      a3839693
    • Richard Smith's avatar
      [c++20] Synthesis of defaulted comparison functions. · cafc7416
      Richard Smith authored
      Array members are not yet handled. In addition, defaulted comparisons
      can't yet find comparison operators by unqualified lookup (only by
      member lookup and ADL). These issues will be fixed in follow-on changes.
      cafc7416
    • Zahira Ammarguellat's avatar
    • Amaury Séchet's avatar
    • Nico Weber's avatar
      Fix a few doc typos, to cycle bots. · 761dd780
      Nico Weber authored
      761dd780
    • Jonas Devlieghere's avatar
      [lldb/SWIG] Guard embedded Python code in SWIG interfaces by SWIGPYTHON · 0a570345
      Jonas Devlieghere authored
      Guard the embedded Python code in LLDB's interface files by the
      SWIGPYTHON define to ensures they can be reused for other languages
      supported by SWIG.
      0a570345
    • rollrat's avatar
      [NFC][LivePhysRegs] Fix incorrect comment · 9fdb7ac5
      rollrat authored
      Reviewers: #llvm, tellenbach
      
      Reviewed By: tellenbach
      
      Subscribers: hiraditya, llvm-commits
      
      Tags: #llvm
      
      Differential Revision: https://reviews.llvm.org/D71051
      
      Patch by: rollrat <rollrat.cse@gmail.com>
      9fdb7ac5
    • Bryan Chan's avatar
      [Frontend] Allow OpenMP offloading to aarch64 · 74e6ce25
      Bryan Chan authored
      Summary:
      D30644 added OpenMP offloading to AArch64 targets, then D32035 changed the
      frontend to throw an error when offloading is requested for an unsupported
      target architecture. However the latter did not include AArch64 in the list
      of supported architectures, causing the following unit tests to fail:
      
          libomptarget :: api/omp_get_num_devices.c
          libomptarget :: mapping/pr38704.c
          libomptarget :: offloading/offloading_success.c
          libomptarget :: offloading/offloading_success.cpp
      
      Reviewers: pawosm01, gtbercea, jdoerfert, ABataev
      
      Subscribers: kristof.beyls, guansong, cfe-commits
      
      Tags: #clang
      
      Differential Revision: https://reviews.llvm.org/D70804
      74e6ce25
  2. Dec 08, 2019
  3. Dec 07, 2019
    • Jonas Hahnfeld's avatar
      [OpenMP] Require trivially copyable type for mapping · 071dca24
      Jonas Hahnfeld authored
      A trivially copyable type provides a trivial copy constructor and a trivial
      copy assignment operator. This is enough for the runtime to memcpy the data
      to the device. Additionally there must be no virtual functions or virtual
      base classes and the destructor is guaranteed to be trivial, ie performs
      no action.
      The runtime does not require trivial default constructors because on alloc
      the memory is undefined. Thus, weaken the warning to be only issued if the
      mapped type is not trivially copyable.
      
      Differential Revision: https://reviews.llvm.org/D71134
      071dca24
    • Ulrich Weigand's avatar
      [FPEnv] Constrained FCmp intrinsics · 9db13b5a
      Ulrich Weigand authored
      This adds support for constrained floating-point comparison intrinsics.
      
      Specifically, we add:
      
            declare <ty2>
            @llvm.experimental.constrained.fcmp(<type> <op1>, <type> <op2>,
                                                metadata <condition code>,
                                                metadata <exception behavior>)
            declare <ty2>
            @llvm.experimental.constrained.fcmps(<type> <op1>, <type> <op2>,
                                                 metadata <condition code>,
                                                 metadata <exception behavior>)
      
      The first variant implements an IEEE "quiet" comparison (i.e. we only
      get an invalid FP exception if either argument is a SNaN), while the
      second variant implements an IEEE "signaling" comparison (i.e. we get
      an invalid FP exception if either argument is any NaN).
      
      The condition code is implemented as a metadata string.  The same set
      of predicates as for the fcmp instruction is supported (except for the
      "true" and "false" predicates).
      
      These new intrinsics are mapped by SelectionDAG codegen onto two new
      ISD opcodes, ISD::STRICT_FSETCC and ISD::STRICT_FSETCCS, again
      representing quiet vs. signaling comparison operations.  Otherwise
      those nodes look like SETCC nodes, with an additional chain argument
      and result as usual for strict FP nodes.  The patch includes support
      for the common legalization operations for those nodes.
      
      The patch also includes full SystemZ back-end support for the new
      ISD nodes, mapping them to all available SystemZ instruction to
      fully implement strict semantics (scalar and vector).
      
      Differential Revision: https://reviews.llvm.org/D69281
      9db13b5a
    • LLVM GN Syncbot's avatar
      gn build: Merge e60b36cf · 85c98f4c
      LLVM GN Syncbot authored
      85c98f4c
    • Florian Hahn's avatar
      [VPlan] Rename VPlanHCFGTransforms to VPlanTransforms (NFC). · e60b36cf
      Florian Hahn authored
      The file is intended to gather various VPlan transformations, not only
      CFG related transforms. Actually, the only transformation there is not
      CFG related.
      
      Reviewers: Ayal, gilr, hsaito, rengolin
      
      Reviewed By: gilr
      
      Differential Revision: https://reviews.llvm.org/D70732
      e60b36cf
    • Kai Luo's avatar
      [PowerPC] Fix MI peephole optimization for splats · 88435154
      Kai Luo authored
      Summary:
      This patch fixes an issue where the PPC MI peephole optimization pass incorrectly remove a vector swap.
      
      Specifically, the pass can combine a splat/swap to a splat/copy. It uses `TargetRegisterInfo::lookThruCopyLike` to determine that the operands to the splat are the same. However, the current logic only compares the operands based on register numbers. In the case where the splat operands are ultimately feed from the same physical register, the pass can incorrectly remove a swap if the feed register for one of the operands has been clobbered.
      
      This patch adds a check to ensure that the registers feeding are both virtual registers or the operands to the splat or swap are both the same register.
      
      Here is an example in pseudo-MIR of what happens in the test cased added in this patch:
      
      Before PPC MI peephole optimization:
      ```
      %arg = XVADDDP %0, %1
      
      $f1 = COPY %arg.sub_64
      call double rint(double)
      %res.first = COPY $f1
      %vec.res.first = SUBREG_TO_REG 1, %res.first, %subreg.sub_64
      
      %arg.swapped = XXPERMDI %arg, %arg, 2
      $f1 = COPY %arg.swapped.sub_64
      call double rint(double)
      %res.second = COPY $f1
      
      %vec.res.second = SUBREG_TO_REG 1, %res.second, %subreg.sub_64
      %vec.res.splat = XXPERMDI %vec.res.first, %vec.res.second, 0
      %vec.res = XXPERMDI %vec.res.splat, %vec.res.splat, 2
      ; %vec.res == [ %vec.res.second[0], %vec.res.first[0] ]
      ```
      
      After optimization:
      ```
      ; ...
      %vec.res.splat = XXPERMDI %vec.res.first, %vec.res.second, 0
      ; lookThruCopyLike(%vec.res.first) == lookThruCopyLike(%vec.res.second) == $f1
      ; so the pass replaces the swap with a copy:
      %vec.res = COPY %vec.res.splat
      ; %vec.res == [ %vec.res.first[0], %vec.res.second[0] ]
      ```
      
      As best as I can tell, this has occurred since r288152, which added support for lowering certain vector operations to direct moves in the form of a splat.
      
      Committed for vddvss (Colin Samples). Thanks Colin for the patch!
      Differential Revision: https://reviews.llvm.org/D69497
      88435154
    • Tom Stellard's avatar
      export.sh: Fetch sources from GitHub instead of SVN · edf6717d
      Tom Stellard authored
      Reviewers: hansw, jdoerfert
      
      Subscribers: sylvestre.ledru, mgorny, hans, llvm-commits
      
      Tags: #llvm
      
      Differential Revision: https://reviews.llvm.org/D70460
      edf6717d
    • Peter Collingbourne's avatar
      Driver: Don't look for libc++ headers in the install directory on Android. · 198fbcb8
      Peter Collingbourne authored
      The NDK uses a separate set of libc++ headers in the sysroot. Any headers
      in the installation directory are not going to work on Android, not least
      because they use a different name for the inline namespace (std::__1 instead
      of std::__ndk1).
      
      This effectively makes it impossible to produce a single toolchain that is
      capable of targeting both Android and another platform that expects libc++
      headers to be installed in the installation directory, such as Mac.
      
      In order to allow this scenario to work, stop looking for headers in the
      install directory on Android.
      
      Differential Revision: https://reviews.llvm.org/D71154
      198fbcb8
    • Amara Emerson's avatar
    • Sterling Augustine's avatar
      Move variable only used in an assert into the assert itself. · aa3c877f
      Sterling Augustine authored
      This prevents unused variable warnings from breaking the build.
      aa3c877f
    • Richard Smith's avatar
      5253d913
    • Amara Emerson's avatar
      [AArch64][GlobalISel] Add support for selection of vector G_SHL with immediates. · c77b4411
      Amara Emerson authored
      Only implemented for the type combinations already supported for G_SHL.
      
      Differential Revision: https://reviews.llvm.org/D71153
      c77b4411
    • Jonas Devlieghere's avatar
    • Stephen Kelly's avatar
      Add matchDynamic convenience functions · 2e8dc859
      Stephen Kelly authored
      Summary: These correspond to the existing match() free functions.
      
      Reviewers: aaron.ballman
      
      Subscribers: cfe-commits
      
      Differential Revision: https://reviews.llvm.org/D54406
      2e8dc859
    • Peter Collingbourne's avatar
      gn build: Change scudo's list of supported platforms to a whitelist. · 31312492
      Peter Collingbourne authored
      Scudo only supports building for android/linux/fuchsia, so require target_os to
      be one of linux/fuchsia to do a stage2_unix scudo build. Android is already
      covered by the stage2_android* toolchains below.
      
      Differential Revision: https://reviews.llvm.org/D71131
      31312492