Add a partial read/write tests for x87 FPU registers.  This includes
reading and writing ST registers, control registers and floating-point
exception data registers (fop, fip, fdp).

The tests assume the current (roughly incorrect) behavior of reporting
the 'abridged' 8-bit ftag state as 16-bit ftag.  They also assume Linux
plugin behavior of reporting fip/fdp split into halves as (fiseg, fioff)
and (foseg, fooff).

Differential Revision: https://reviews.llvm.org/D88583

Multiple fixes related to bugs discovered while debugging a crash
when reading all registers on i386.

The underlying problem was that GetSetForNativeRegNum() did not account
for MPX registers on i386, and since it only compared against upper
bounds of each known register set, the MPX registers were classified
into the wrong set and therefore considered supported.  However, they
were not expected in RegNumX86ToX86_64() and caused the assertion
to fail.

This includes:

- adding (unused) i386 → x86_64 translations for MPX registers
- fixing GetSetForNativeRegNum() to check both lower and upper bound
  for register sets, to avoid wrongly classifying unhandled register
  sets
- adding missing range check for MPX registers on i386
- renaming k_last_mpxr to k_last_mpxr_i386 for consistency
- replacing return-assertions with llvm_unreachable() and adding more
  checks for unexpected parameters

Differential Revision: https://reviews.llvm.org/D88682

Fix reading FIP/FDP registers to correctly return segment and offset
parts.  On amd64, this roughly matches the Linux behavior of splitting
the 64-bit FIP/FDP into two halves, and putting the higher 32 bits
into f*seg and lower into f*off.  Well, actually we use only 16 bits
of higher half but the CPUs do not seem to handle more than that anyway.

Differential Revision: https://reviews.llvm.org/D88681

Do not instrument user-defined ELF sections (whose names resemble valid
C identifiers).  They may have special use semantics and modifying them
may break programs.  This is e.g. the case with NetBSD __link_set API
that expects these sections to store consecutive array elements.

Differential Revision: https://reviews.llvm.org/D76665

Some initial test coverage toward fixing PR46896 - these are just copied from rotate.ll

We can't use Use.Calls after its std::move()'d to TmpCalls as it will be in an undefined state. Instead, swap with the known empty map in TmpCalls so we can then safely emplace_back into the now empty Use.Calls.

Fixes clang static analyzer warning.

This reverts commit 78530ce6.

Fails on shared_lib build.

If we know the shift amount is less than the bitwidth we should be able to convert this to a rotate/funnel shift

Class simplifies keeping track of the indentation while emitting. For every new line the current indentation is simply prefixed (if not at start of line, then it just emits as normal). Add a simple Region helper that makes it easy to have the C++ scope match the emitted scope.

Use this in op doc generator and rewrite generator.

Differential Revision: https://reviews.llvm.org/D84107

We were not accounting for the pointer offset when splitting a store from
a VMOVDRR node, which could lead to incorrect aliasing info. In this
case it is the fneg via integer arithmetic that gives us a store->load
pair that we started getting wrong.

Differential Revision: https://reviews.llvm.org/D88653

Add basic vector handling to recognizeBSwapOrBitReverseIdiom/collectBitParts - this works at the element level, all vector element operations must match (splat constants etc.) and there is no cross-element support (insert/extract/shuffle etc.).

Try to appease buildbots breakages due to D88578

This patch fixes one worning. Since Flang sets `-Werror`, that's
sufficient for a build to fail. As per flang/README.md, Clang-10 is one
of the officially supported compilers.

Differential Revision: https://reviews.llvm.org/D88723

Prevent rewrite when an unqualified id in a typedef type collides
with a function argument name. Fixes PR44206.

[InstCombine] recognizeBSwapOrBitReverseIdiom - support for 'partial' bswap patterns (PR47191) (Reapplied)

If we're bswap'ing some bytes and zero'ing the remainder we can perform this as a bswap+mask which helps us match 'partial' bswaps as a first step towards folding into a more complex bswap pattern.

Reapplied with early-out if recognizeBSwapOrBitReverseIdiom collects a source wider than the result type.

Differential Revision: https://reviews.llvm.org/D88578

http://lab.llvm.org:8011/builders/llvm-clang-win-x-armv7l/builds/1482/steps/build-llvm-project/logs/stdio
http://lab.llvm.org:8011/builders/llvm-clang-win-x-aarch64/builds/3285/steps/build-llvm-project/logs/stdio

The function `TryListConversion` didn't properly validate the following
part of the standard:

    Otherwise, if the parameter type is a character array [... ]
    and the initializer list has a single element that is an
    appropriately-typed string literal (8.5.2 [dcl.init.string]), the
    implicit conversion sequence is the identity conversion.

This caused the following call to `f()` to be ambiguous.
    void f(int(&&)[1]);
    void f(unsigned(&&)[1]);

    void g(unsigned i) {
      f({i});
    }

This issue only occurs when the initializer list had one element.

Differential Revision: https://reviews.llvm.org/D87561

So we don't have to pass through more parameters in the future.

This one doesn't even have any dead stores to eliminate...

This helper method is useful even outside of Gnu toolchains, so move
it to ToolChain so it can be reused in other toolchains such as Fuchsia.

Differential Revision: https://reviews.llvm.org/D88452

Add a comment to hopefully prevent anyone else from making the
same mistake.

[X86] Add missing intrinsic test for aesdecwide128kl and aesdecwide256kl. Capture all output values in keylocker tests. NFC

The aesdec/enc instructions produce a flag output and one or eight
xmm regsiter outputs. The test were not capturing the xmm outputs.

Also add nounwind to tests to remove .cfi directives

This reverts commit 1c897e9d.

It broke builds for 32-bit targets.

Differential Revision: https://reviews.llvm.org/D88768

This moves the platform-specific parameter logic from asan into
lsan_common.h to lsan can share it.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D87795

Adjusted when to check RSS.

Patch by: Mark Kettenis

Test provided by Jessica Clarke.

Differential Revision: https://reviews.llvm.org/D87210

When we call cmake_pop_check_state, we undo any changes to REQUIRED
variables performed by HandleLLVMOptions which is undesirable. Rather
use replacement which is what we've used prior to 8d26760a.

Differential Revision: https://reviews.llvm.org/D88756

This reverts commit a594fd28 which
is failign on some bots.

AMDGPU toolchain currently only diagnose invalid target ID for OpenCL
source compilation. Invalid target ID is not diagnosed for assembler.

This patch fixes that.

Differential Revision: https://reviews.llvm.org/D88377

`TempAutoDictionary` is never used.  Maybe a leftover of a previous
experiment?

Differential Revision: https://reviews.llvm.org/D88763

Currently CUDA/HIP toolchain uses "unknown" as bound arch
for offload action for fat binary. This causes -mcpu or -march
with "unknown" added in HIPToolChain::TranslateArgs or
CUDAToolChain::TranslateArgs.

This causes issue for https://reviews.llvm.org/D88377 since
HIP toolchain needs to check -mcpu in HIPToolChain::TranslateArgs.

The bound arch of offload action for fat binary is not really
used, therefore set it to CudaArch::UNUSED.

Differential Revision: https://reviews.llvm.org/D88524

It seems that one buildnot RSS value is much higher after munmap than
local run.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D88690

We now recognize this function as a builtin despite it having an
unexpected number of parameters; make sure we don't enforce that it has
only 1 argument for its 2 parameters.