It caused hangups in compiling clang/lib/Parse/ParseDecl.cpp and clang/lib/Driver/Tools.cpp in stage2 on some hosts.

llvm-svn: 174374

In case of partial right OOB, ASan was reporting
  X is located 0 bytes to the right of [A, B)
where X was actually inside [A, B).

With this change, ASan will report B as the error address in such case.

llvm-svn: 174373

The sh_link in the ELF section header of .ARM.exidx should
be filled with the section index of the corresponding text
section.

llvm-svn: 174372

Also adds some costs for vector integer float conversions.

llvm-svn: 174371

This should fix three purely whitespace issues:
    + 80 column violations.
    + Tab characters.
    + TableGen brace placement.

No functional changes.

llvm-svn: 174370

This moves the bit twiddling and string fiddling functions required by other
parts of the backend into a separate library. Previously they resided in
AArch64Desc, which created a circular dependency between various components.

llvm-svn: 174369

llvm-svn: 174368

Everything except INITIALIZE_PASS_* macros

llvm-svn: 174367

clang-format was able to format the entire file except the final
INITIALIZE_PASS_* macros.

llvm-svn: 174366

llvm-svn: 174365

We can now format stuff like:
- (void)doSomethingWith:(GTMFoo *)theFoo
                   rect:(NSRect)theRect
               interval:(float)theInterval {
  [myObject doFooWith:arg1 //
                 name:arg2
                error:arg3];

}

This seems to fix everything mentioned in llvm.org/PR14939.

llvm-svn: 174364

Before:
f(aaaaaaaaaaaaaaaaaaaa, aaaaaaaaaaaaaaaaaaaa, aaaaaaaaaaaaaaaaaaaa +
  aaaaaaaaaaaaaaaaaaaa);
aaaaaaa(aaaaaaaaaaaaa, aaaaaaaaaaaaa, aaaaaaaaaaaaa(aaaaaaaaaaaaaaaaa,
                                                    aaaaaaaaaaaaaaaa));

After:
f(aaaaaaaaaaaaaaaaaaaa,
  aaaaaaaaaaaaaaaaaaaa,
  aaaaaaaaaaaaaaaaaaaa + aaaaaaaaaaaaaaaaaaaa);
aaaaaaa(aaaaaaaaaaaaa,
        aaaaaaaaaaaaa,
        aaaaaaaaaaaaa(aaaaaaaaaaaaaaaaa, aaaaaaaaaaaaaaaa));

llvm-svn: 174363

llvm-svn: 174362

In preprocessor definitions, we would not parse all the tokens and thus
not annotate them anymore. This led to a wrong formatting of comments
in google style:

  #endif // HEADER_GUARD  -- requires two spaces

llvm-svn: 174361

MicroMips architectures. 

Contributer: Zoran Jovanovic
 
llvm-svn: 174360

llvm-svn: 174359

and enables the instruction printer to print aliased 
instructions. 

Due to usage of RegisterOperands a change in common 
code (utils/TableGen/AsmWriterEmitter.cpp) is required 
to get the correct register value if it is a RegisterOperand.

Contributer: Vladimir Medic
 
llvm-svn: 174358

llvm-svn: 174357

llvm-svn: 174356

llvm-svn: 174355

for MipsELFStreamer objects.

Contributer: Jack Carter
 
llvm-svn: 174354

llvm-svn: 174353

for the first compile unit.

llvm-svn: 174352

skeleton CU as part of the DWARF5 split dwarf proposal.

llvm-svn: 174351

DWARF5 split dwarf proposal.

llvm-svn: 174350

the DWARF5 split dwarf proposal.

llvm-svn: 174349

llvm-svn: 174348

llvm-svn: 174347

llvm-svn: 174346

externally_initialized return false for hasDefiniteInitializer and
hasUniqueInitializer.

rdar://12580965.

llvm-svn: 174345

Revert "Remove sparse text on diagnostic options.  These are not really documented anywhere, and they really aren't for normal users."

I changed my mind.  We should just document these in the man page.

llvm-svn: 174344

it would replace the load with one with the higher alignment.  However, it did
not place the new load in the worklist, which prevented later DAG combines in
the same phase (for example, target-specific combines) from ever seeing it.

This patch corrects that oversight, and updates some tests whose output changed
due to slightly different DAGCombine outputs.

llvm-svn: 174343

llvm-svn: 174342

claims it will improve performance.

llvm-svn: 174341

llvm-svn: 174340

vector initialization. Patch by John Stratton!

llvm-svn: 174339

Remove sparse text on diagnostic options.  These are not really documented anywhere, and they really aren't for normal users.

llvm-svn: 174338

llvm-svn: 174337

Per discussion in rdar://13127907, we should emit a hard error only if
people write code where the requested alignment is larger than achievable
and assumes the low bits are zeros. A warning should be good enough when
we are not sure if the source code assumes the low bits are zeros.

rdar://13127907

llvm-svn: 174336

Rename the PARAMATTR_CODE_ENTRY to PARAMATTR_CODE_ENTRY_OLD. It will be replaced
by another encoding. Keep around the current LLVM attribute encoder/decoder
code, but move it to the bitcode directories so that no one's tempted to use
them.

llvm-svn: 174335