Summary:
Whole quad mode is already enabled for pixel shaders that compute
derivatives, but it must be suspended for instructions that cause a
shader to have side effects (i.e. stores and atomics).

This pass addresses the issue by storing the real (initial) live mask
in a register, masking EXEC before instructions that require exact
execution and (re-)enabling WQM where required.

This pass is run before register coalescing so that we can use
machine SSA for analysis.

The changes in this patch expose a problem with the second machine
scheduling pass: target independent instructions like COPY implicitly
use EXEC when they operate on VGPRs, but this fact is not encoded in
the MIR. This can lead to miscompilation because instructions are
moved past changes to EXEC.

This patch fixes the problem by adding use-implicit operands to
target independent instructions. Some general codegen passes are
relaxed to work with such implicit use operands.

Reviewers: arsenm, tstellarAMD, mareko

Subscribers: MatzeB, arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18162

llvm-svn: 263982

llvm-svn: 263981

llvm-svn: 263980

ASan interceptors contain local statics which run before the CRT is
initialized. Thread-safe statics appear to rely on CRT-internal state,
and will crash without this flag.

llvm-svn: 263979

- R10 and R11 are not reserved registers.
- Check for reserved registers when finding unused caller-saved registers.

llvm-svn: 263977

llvm-svn: 263976

This changes the debug output, but still retains its usefulness.
Differential Revision: http://reviews.llvm.org/D18324

llvm-svn: 263975

llvm-svn: 263974

This resolves errors about char16_t and char32_t when compiling 2015 STL
headers with clang.

llvm-svn: 263973

a way for compilation to take a "thread to use for compilation".  If it isn't set then the
compilation will use the currently selected thread.  This should help keep function execution
to the one thread intended.

llvm-svn: 263972

[llvm-objdump] Printing relocations in executable and shared object files.  This partially reverts r215844 by removing test objdump-reloc-shared.test which stated GNU objdump doesn't print relocations, it does.

In executable and shared object ELF files, relocations in the file contain the final virtual address rather than section offset so this is adjusted to display section offset.

Differential revision: http://reviews.llvm.org/D15965

llvm-svn: 263971

llvm-svn: 263970

Summary:
When control flow is implemented using the exec mask, the compiler will
insert branch instructions to skip over the masked section when exec is
zero if the section contains more than a certain number of instructions.

The previous code would only count instructions in successor blocks,
and this patch modifies the code to start counting instructions in all
blocks between the start and end of the branch.

Reviewers: nhaehnle, arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18282

llvm-svn: 263969

Differential revision: http://reviews.llvm.org/D18232

llvm-svn: 263968

OMP_critical - time spent in critical section
OMP_critical_wait - time spent waiting to enter a critical section

llvm-svn: 263967

In VS 2015, the memset fill parameter is zero extended from one byte
instead of being copied wholesale.

The issue reproduces with existing tests if you use VS2015.

llvm-svn: 263966

llvm-svn: 263965

These instructions do not have the same negative base
address problem that DS instructions do on SI.

llvm-svn: 263964

Add names missing from rL263822 and add tests to prevent future omissions.

llvm-svn: 263963

This introduces a custom lowering for ISD::SETCCE (introduced in r253572)
that allows us to emit a short code sequence for 64-bit compares.

Before:

	push	{r7, lr}
	cmp	r0, r2
	mov.w	r0, #0
	mov.w	r12, #0
	it	hs
	movhs	r0, #1
	cmp	r1, r3
	it	ge
	movge.w	r12, #1
	it	eq
	moveq	r12, r0
	cmp.w	r12, #0
	bne	.LBB1_2
@ BB#1:                                 @ %bb1
	bl	f
	pop	{r7, pc}
.LBB1_2:                                @ %bb2
	bl	g
	pop	{r7, pc}

After:

	push	{r7, lr}
	subs	r0, r0, r2
	sbcs.w	r0, r1, r3
	bge	.LBB1_2
@ BB#1:                                 @ %bb1
	bl	f
	pop	{r7, pc}
.LBB1_2:                                @ %bb2
	bl	g
	pop	{r7, pc}

Saves around 80KB in Chromium's libchrome.so.

Some notes on this patch:

- I don't much like the ARMISD::BRCOND and ARMISD::CMOV combines I
  introduced (nothing else needs them). However, they are necessary in
  order to avoid poor codegen, and they seem similar to existing combines
  in other backends (e.g. X86 combines (brcond (cmp (setcc Compare))) to
  (brcond Compare)).

- No support for Thumb-1. This is in principle possible, but we'd need
  to implement ARMISD::SUBE for Thumb-1.

Differential Revision: http://reviews.llvm.org/D15256

llvm-svn: 263962

The operators | and & in types, as opposed to the bitwise operators,
should not have whitespace around them (e.g. `Foo<Bar|Baz>`).

Patch by Martin Probst. Thank you.

llvm-svn: 263961

This commit adds a named argument to AvailabilityAttr, while r263652 adds an
optional string argument to __attribute__((deprecated)).

This was commited in r263687 and reverted in 263752 due to misaligned
access.

rdar://20588929

llvm-svn: 263958

Patch by Sam Parker.

llvm-svn: 263957

Adding Cortex-A32 as an available target in the ARM backend.

Patch by Sam Parker.

llvm-svn: 263956

This makes it easy to add more data into Availability.

llvm-svn: 263955

This change logically separates the stats_flags_e::noTotal bit flag from the
stats_flags_e::onlyInMaster and stats_flags_e::noUnits bit flags. If no
TOTAL_foo output is wanted for a particular statistic, the flag must be
explicitly included in that statistic's flags.

Differential Revision: http://reviews.llvm.org/D18198

llvm-svn: 263954

/FC affects if diagnostics print with full paths and if __FILE__ expands with a
full path.  clang-cl does both of these two by default.

llvm-svn: 263953

Implements "readelf -sW and readelf -DsW"

Differential Revision: http://reviews.llvm.org/D18224

llvm-svn: 263952

No functional change, just a little more readable.

llvm-svn: 263951

llvm-svn: 263950

llvm-svn: 263948

Summary:
The Microsoft compiler emits

  warning C4229: anachronism used : modifiers on data are ignored

for

  struct {} __cdecl s;

but ICU's gendict can generate such (and does when building
LibreOffice), so accepting this in clang-cl too would be useful.

Reviewers: rnk

Patch by Stephan Bergmann

Differential Revision: http://reviews.llvm.org/D16628

llvm-svn: 263947

llvm-svn: 263946

llvm-svn: 263945

This reverts commit r263664.

The reason we were getting broken files was lld -r, and that has been
fixed.

llvm-svn: 263944

This patch adds a regular expression to configure suffixes of an
included file to check whether it is the "main" include of the current
file. Previously, clang-format has allowed arbitrary suffixes on the
formatted file, which is still the case when no IncludeMainRegex is
specified.

llvm-svn: 263943

llvm-svn: 263942

Summary:
replaceCongruentIVs can break LCSSA when trying to replace IV increments
since it tries to replace all uses of a phi node with another phi node
while both of the phi nodes are not necessarily in the processed loop.
This will cause an assert in IndVars.

To fix this, we add a check to make sure that the replacement maintains
LCSSA.

Reviewers: sanjoy

Subscribers: mzolotukhin, llvm-commits

Differential Revision: http://reviews.llvm.org/D18266

llvm-svn: 263941

Without this patch a simple '#pragma omp parallel num_threads(1)' leads to
ompt_event_parallel_begin: parent_task_id=3, [...], parallel_id=2, [...]
ompt_event_parallel_end: parallel_id=2, task_id=4, [...]

Differential Revision: http://reviews.llvm.org/D16714

llvm-svn: 263940

`__tsan_get_report_thread` and others can crash if a stack trace is missing, let's add the missing checks.

Differential Revision: http://reviews.llvm.org/D18306

llvm-svn: 263939