- Feb 04, 2021
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Krzysztof Parzyszek authored
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Félix Cloutier authored
rdar://73742471 Differential Revision: https://reviews.llvm.org/D95695
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Rong Xu authored
This patch detaches SampleProfileLoader from class SampleCoverageTracker. We plan to move SampleProfileLoader to a template class. This would remain SampleCoverageTracker as a class. Also make callsiteIsHot() as a file static function. Differential Revision: https://reviews.llvm.org/D95823
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Yaxun (Sam) Liu authored
Extract registering device variable to CUDA runtime codegen function since it will be called in multiple places. Reviewed by: Artem Belevich Differential Revision: https://reviews.llvm.org/D95558
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Christian Sigg authored
Differential Revision: https://reviews.llvm.org/D95857
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Justin Bogner authored
These two cases have identical implementations other than an unreachable part of `G_ADD` that checks if the scalar we're narrowing is a vector. Combining them to avoid unnecessary divergence.
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Christian Sigg authored
Differential Revision: https://reviews.llvm.org/D95856
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Matt Arsenault authored
This was only adding undef to the use if the copy itself had a subregister index. It did not consider the subrange liveness if the use had a subreg index to begin with.
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Peter Steinfeld authored
Constant folding for calls to LBOUND() was not working when the lower bound of a constant array was not 1. I fixed this and re-enabled the test in Evaluate/folding16.f90 that previously was silently failing. I slightly changed the test to parenthesize the first argument to exercise all of the new code. Differential Revision: https://reviews.llvm.org/D95894
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Jianzhou Zhao authored
Reviewed-by: morehouse Differential Revision: https://reviews.llvm.org/D95923
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Jianzhou Zhao authored
Reviewed-by: morehouse Differential Revision: https://reviews.llvm.org/D95957
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Siva Chandra authored
This expands the pattern suggest in https://reviews.llvm.org/D95850 to all math functions.
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Roland McGrath authored
Fuchsia is migrating to a variable page size. Reviewed By: phosek, charco Differential Revision: https://reviews.llvm.org/D95919
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Jez Ng authored
Per https://reviews.llvm.org/D94938#inline-896740.
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Jez Ng authored
Per https://reviews.llvm.org/D95121#inline-897943.
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Jez Ng authored
This extends {D92539} to work even when we are loading archive members via `-force_load`. I uncovered this issue while trying to force-load archives containing bitcode -- we were segfaulting. In addition to fixing the `-force_load` case, this diff also addresses the behavior of `-ObjC` when LTO bitcode is involved -- we need to force-load those archive members if they contain ObjC categories. Reviewed By: #lld-macho, smeenai Differential Revision: https://reviews.llvm.org/D95265 -
Jez Ng authored
This makes our error messages more informative. But the bigger motivation is for LTO symbol resolution, which will be in an upcoming diff. The changes in this one are largely mechanical. Reviewed By: #lld-macho, smeenai Differential Revision: https://reviews.llvm.org/D94316
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Matt Arsenault authored
If we had a pair of copies inside a loop which introduced new liveness to a subregister which was undef before the loop, we would have a dummy phi-only segment remaining across the loop body. Later, this false segment would confuse RenameIndependentSubregs causing it to introduce IMPLICIT_DEFs with broken value numbering. It seems always adding the lanes to ShrinkMask is OK, so any conditions should be purely a compile time filter.
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Jonas Devlieghere authored
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Roland McGrath authored
Fuchsia is migrating to a variable page size. Reviewed By: hctim Differential Revision: https://reviews.llvm.org/D95920
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Roland McGrath authored
Fuchsia is migrating to a variable page size. Reviewed By: hctim Differential Revision: https://reviews.llvm.org/D95921
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Matt Arsenault authored
This reverts commit 1e377a27. A regression was reported.
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Stanislav Mekhanoshin authored
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Craig Topper authored
If sext_inreg is supported, we will turn this into sext_inreg. That will then remove it if there are enough sign bits. But if sext_inreg isn't supported, we can still remove the shift pair based on sign bits. Split from D95890.
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Sourabh Singh Tomar authored
Reviewed By: schweitz, mehdi_amini Differential Revision: https://reviews.llvm.org/D95958
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Shilei Tian authored
D77609 mistakenly changed the bebavior of task waiting on detachable task that a detachable task is not waited, based on https://lists.llvm.org/pipermail/openmp-dev/2021-February/003836.html. This patch fixed it. Thank Raúl for the report. Reviewed By: jdoerfert Differential Revision: https://reviews.llvm.org/D95798
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Jeremy Morse authored
This reverts commit ddc2f1e3. A build-bot objected: http://lab.llvm.org:8011/#builders/105/builds/5486
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Florian Hahn authored
This patch updates the induction value creation to use VPValues of recipes to map the created values. This should bring is one step closer to being able to optimize induction recipes directly in VPlan. Currently widenIntOrFpInduction also generates vector values for a cast of the induction, if it exists. Make this explicit by adding the cast instruction to the values defined by the recipe. Reviewed By: gilr Differential Revision: https://reviews.llvm.org/D92284
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Jeremy Morse authored
Discussed in this thread: https://lists.llvm.org/pipermail/llvm-dev/2021-January/148139.html DwarfDebug::collectEntityInfo accidentally distinguishes between variable locations that never have a location specified, and variable locations that have an empty location specified. The latter leads to the creation of an empty variable referring to the abstract origin. Fix this by seeking a non-empty location before producing a concrete entity, to guarantee a DW_AT_location will be produced. Other loops in collectEntityInfo and endFunctionImpl take care of examining the retainedNodes collection and ensuring optimised-out variables are created. Differential Revision: https://reviews.llvm.org/D95617
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Sourabh Singh Tomar authored
Part of upstreaming effort, PR: https://github.com/flang-compiler/f18-llvm-project/pull/296 Reviewed By: schweitz Differential Revision: https://reviews.llvm.org/D95950
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Jianzhou Zhao authored
Similar to https://reviews.llvm.org/D95642, this diff fixes signal. Reviewed-by: morehouse Differential Revision: https://reviews.llvm.org/D95896
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Krzysztof Parzyszek authored
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peter klausler authored
Now that semantics is working, the standard -fsyntax-only option of GNU and Clang should be used as the name of the option that causes f18 to just run the front-end. Support both options in f18, silently accepting the old option as a synonym for the new one (as preferred by the code owner), and replace all instances of the old -fparse-only option with -fsyntax-only throughout the source base. Differential Revision: https://reviews.llvm.org/D95887
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Kevin P. Neal authored
[FPEnv][X86] Platform builtins edition: clang should get from the AST the metadata for constrained FP builtins Currently clang is not correctly retrieving from the AST the metadata for constrained FP builtins. This patch fixes that for the X86 specific builtins. Differential Revision: https://reviews.llvm.org/D94614
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Florian Hahn authored
This patch adds a set of tests in which we can add the information from the pre-header to a loop header, but currently do not do so.
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Jay Foad authored
This fixes TableGen parser errors that will be reported when D95874 is applied. Differential Revision: https://reviews.llvm.org/D95955
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- Feb 03, 2021
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Juneyoung Lee authored
This reverts commit 53040a96 due to its bad interaction with select i1 -> and/or i1 transformation. This fixes: https://bugs.llvm.org/show_bug.cgi?id=49005 https://bugs.llvm.org/show_bug.cgi?id=48435
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Abhina Sreeskantharajan authored
On z/OS, other error messages are not matched correctly in lit tests. ``` EDC5121I Invalid argument. EDC5111I Permission denied. ``` This patch adds a lit substitution to fix it. Reviewed By: jhenderson Differential Revision: https://reviews.llvm.org/D95808
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Matt Arsenault authored
For the fixed ABI, set this in the initial argument constructor, rather than relying on the allocation logic to set the values. Also stop passing them for amdgpu_gfx, since the DAG path seems to skip these. I'm unclear on what amdgpu_gfx's expectations are. This will allow moving the special input registers out of the normal argument range.
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Sanjay Patel authored
This goes with the dyn_cast fix: 0fa61304 That was made after noticing that the assert was over-reaching here: bbed5f2f ( D95690 )
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