1. Feb 17, 2021
    • Craig Topper's avatar
      [SelectionDAG][AArch64] Restrict matchUnaryPredicate to only handle... · 064ada4e
      Craig Topper authored
      [SelectionDAG][AArch64] Restrict matchUnaryPredicate to only handle SPLAT_VECTOR for scalable vectors.
      
      fde24661 added support for
      scalable vectors to matchUnaryPredicate by handling SPLAT_VECTOR in
      addition to BUILD_VECTOR. This was used to enabled UDIV/SDIV/UREM/SREM
      by constant expansion in BuildUDIV/BuildSDIV in TargetLowering.cpp
      
      The caller there expects to call getBuildVector from the match factors.
      This leads to a crash right now if there is a SPLAT_VECTOR of
      fixed vectors since the number of vectors won't match the number
      of elements.
      
      To fix this, this patch updates the callers to check the opcode
      instead of whether the type is fixed or scalable. This assumes
      that only 3 opcodes are handled by matchUnaryPredicate so
      I've added an assertion to the final else to check that opcode.
      
      Reviewed By: RKSimon
      
      Differential Revision: https://reviews.llvm.org/D96174
      064ada4e
    • Alex Zinenko's avatar
      [mlir] tighten LLVM dialect verifiers to generate valid LLVM IR · 2ab57c50
      Alex Zinenko authored
      Verification of the LLVM IR produced when translating various MLIR dialects was
      only active when calling the translation programmatically. This has led to
      several cases of invalid LLVM IR being generated that could not be caught with
      textual mlir-translate tests. Add verifiers for these cases and fix the tests
      in preparation for enforcing the validation of LLVM IR.
      
      Reviewed By: nicolasvasilache
      
      Differential Revision: https://reviews.llvm.org/D96774
      2ab57c50
    • Florian Hahn's avatar
      [AArch64] Convert CMP/SELECT sign patterns to OR & ASR. · 211147c5
      Florian Hahn authored
      ICMP & SELECT patterns extracting the sign of a value can be simplified
      to OR & ASR (see  https://alive2.llvm.org/ce/z/Xx4iZ0).
      
      This does not save any instructions in IR, but it is profitable on
      AArch64, because we need at least 2 extra instructions to materialize 1
      and -1 for the SELECT.
      
      The improvements result in ~5% speedups on loops of the form
      
          static int sign_of(int x) {
            if (x < 0) return -1;
            return 1;
          }
      
          void foo(const int *x, int *res, int cnt) {
            for (int i=0;i<cnt;i++)
              res[i] = sign_of(x[i]);
          }
      
      Reviewed By: dmgreen
      
      Differential Revision: https://reviews.llvm.org/D96596
      211147c5
    • Siva Chandra Reddy's avatar
      [libc][NFC] Make few maths functions buildable outside of LLVM libc build. · dba14814
      Siva Chandra Reddy authored
      Few math functions manipulate errno. They assumed that LLVM libc's errno
      is available. However, that might not be the case when these functions
      are used in a libc which does not use LLVM libc's errno. This change
      switches such uses of LLVM libc's errno to the normal public errno macro.
      This does not affect LLVM libc's build because the include order ensures
      we get LLVM libc's errno. Also, the header check rule ensures we are only
      including LLVM libc's errno.h.
      dba14814
    • Kazu Hirata's avatar
      [analyzer] Fix a warning · 1a323c8a
      Kazu Hirata authored
      This patch fixes a warning from -Wcovered-switch-default.  The switch
      statement in question handles all the enum values.
      1a323c8a
    • Alex Zinenko's avatar
      [mlir] add verifiers for NVVM and ROCDL kernel attributes · 9cd47a26
      Alex Zinenko authored
      Make sure they can only be attached to LLVM functions as a result of converting
      GPU functions to the LLVM Dialect.
      9cd47a26
    • Arnold Schwaighofer's avatar
      [coro async] Don't promote allocas to the frame or rewrite swifterror if... · 627cfd43
      Arnold Schwaighofer authored
      [coro async] Don't promote allocas to the frame or rewrite  swifterror if there are no suspend points
      
      Also don't call function to update the call graph if there are no
      clones. The function will fail.
      
      rdar://74277860
      
      Differential Revision: https://reviews.llvm.org/D96620
      627cfd43
    • clementval's avatar
      [flang][fir] Add fir-opt tool · 8260232c
      clementval authored
      This patch introduce the fir-opt tool. Similar to mlir-opt for FIR.
      It will be used in following patches to test fir opt and round-trip.
      
      Reviewed By: schweitz, mehdi_amini
      
      Differential Revision: https://reviews.llvm.org/D96535
      8260232c
    • David Green's avatar
      [ARM] Use rGPR for writeback vldrs · 1e007cf4
      David Green authored
      From what I can tell, a writeback is unpredictable with LR for both
      loads and stores. This changes the operand from a gprnopc to a rGPR in
      both cases (which I believe is essentially a NFC due to the tied-def
      already being a rGPR.)
      
      Differential Revision: https://reviews.llvm.org/D96723
      1e007cf4
  2. Feb 16, 2021