Commit e381d8b2 authored by Simon Pilgrim's avatar Simon Pilgrim
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[X86][Atom] Fix (U)COMISS/SD uops, latency and throughput

Both ports are required, for reg and mem variants - we can also use the WriteFComX class directly and remove the unnecessary InstRW overrides. Matches what Intel AoM / Agner / InstLatX64 report as well.
parent b7ec8f3d
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