- Jul 07, 2022
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Arnd Bergmann authored
Merge tag 'dt64-cleanup-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Cleanup of ARM64 DTS for v5.20, part two Remaining cleanups for ARM64 DTS: gpio-keys and led node names on Marvel platforms. * tag 'dt64-cleanup-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: marvell: armada-3720: align lednode names with dtschema arm64: dts: marvell: align gpio-key node names with dtschema Link: https://lore.kernel.org/r/20220706163754.33064-1-krzysztof.kozlowski@linaro.org Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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- Jul 06, 2022
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Arnd Bergmann authored
Merge tag 'juno-updates-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt Armv8 Juno/FVP updates for v5.20 Just a small bunch of miscellaneous updates: addition of missing cache-level property to L2 caches on Juno, whitespace adjustments and removal of erroneous 'mbox-name' and 'panel-dpi' compatible in the device tree nodes. * tag 'juno-updates-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: juno: Add cache-level property to L2 caches arm64: dts: arm: adjust whitespace around '=' arm64: dts: arm/juno: Drop erroneous 'mbox-name' property arm64: dts: arm/fvp-base-revc: Remove 'panel-dpi' compatible Link: https://lore.kernel.org/r/20220706115026.2272643-1-sudeep.holla@arm.com Signed-off-by:
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Arnd Bergmann authored
Merge tag 'stm32-dt-for-v5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt STM32 DT for v5.20, round 1 Highlights: ---------- - MCU: -Fix whitespace coding style. No functional changes. - MPU: - General: - Remove specific IPCC wakeup interrupt on STM32MP15. - Enable OPTEE firmware and scmi support (clock/reset) on STM32MP13. It allows to enable RCC clock driver. - Add new pins configurations groups. - DH boards: - Add DHCOR based DRC Compact board. It embeds: 2xETH, 1xCAN, uSD, USB, eMMC and SDIO wifi. - Add ST MIPID02 bindings to AV96 (not enabled by default) - OSD32: - Correct vcc-supply for eeprom. - fix missing internally connected voltage regulator (ldo3 supplied by vdd_ddr). * tag 'stm32-dt-for-v5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (25 commits) ARM: dts: stm32: Add ST MIPID02 bindings to AV96 ARM: dts: stm32: Add alternate pinmux for RCC pin ARM: dts: stm32: Add alternate pinmux for DCMI pins ARM: dts: stm32: Add DHCOR based DRC Compact board ARM: dts: stm32: Add alternate pinmux for UART5 pins ARM: dts: stm32: Add alternate pinmux for UART4 pins ARM: dts: stm32: Add alternate pinmux for UART3 pins ARM: dts: stm32: Add alternate pinmux for SPI2 pins ARM: dts: stm32: Add alternate pinmux for CAN1 pins dt-bindings: arm: stm32: Add compatible string for DH electronics DHCOR DRC Compact ARM: dts: stm32: Fix SPI2 pinmux pin comments on stm32mp15 ARM: dts: stm32: add optee reserved memory on stm32mp135f-dk ARM: dts: stm32: add RCC on STM32MP13x SoC family ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP13 dt-bindings: rcc: stm32: select the "secure" path for stm32mp13 ARM: dts: stm32: correct vcc-supply for eeprom on stm32mp15xx-osd32 ARM: dts: stm32: fix missing internally connected voltage regulator for OSD32MP1 ARM: dts: stm32: adjust whitespace around '=' on MCU boards ARM: dts: stm32: Move DHCOR BUCK3 VDD 2V9 adjustment to 1V8 DTSI ARM: dts: stm32: remove the IPCC "wakeup" IRQ on stm32mp151 ... Link: https://lore.kernel.org/r/a250f32b-f67c-2922-0748-e39dc791e95c@foss.st.com Signed-off-by:
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git://git.kernel.org/pub/scm/linux/kernel/git/at91/linuxArnd Bergmann authored
AT91 DT for v5.20 It contains: - compilation warning fixes for SAMA5D2 - updates for all AT91 device tree to use generic name for reset controller - reset controller node for SAMA7G5 - MCAN1 and UDPHS nodes for LAN966 SoCs - Flexcom3 bindings were updated for lan966x-pcb8291.dts board to cope with reality * tag 'at91-dt-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: lan966x: Add UDPHS support dt-bindings: usb: atmel: Add Microchip LAN9662 compatible string ARM: dts: lan966x: Cleanup flexcom3 usart pinctrl settings. ARM: dts: lan966x: Add mcan1 node. ARM: dts: at91: sama7g5: add reset-controller node ARM: dts: at91: use generic name for reset controller ARM: dts: at91: sama5d2: fix compilation warning ARM: dts: at91: sama5d2: fix compilation warning Link: https://lore.kernel.org/r/20220705084637.818216-1-claudiu.beznea@microchip.com Signed-off-by:
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Arnd Bergmann authored
Merge tag 'ux500-dts-v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt Ux500 DTS updates for the v5.20 kernel: - Fix orientation matrices on a few U8500 mobile phones. - Drop unused i2c power supply handled by the power domain. * tag 'ux500-dts-v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: dts: ux500: Drop unused i2c power domain supply ARM: dts: ux500: Fix Gavini accelerometer mounting matrix ARM: dts: ux500: Fix Codina accelerometer mounting matrix ARM: dts: ux500: Fix Janice accelerometer mounting matrix Link: https://lore.kernel.org/r/CACRpkdY1MG=HG+tOCmD1_LEAStV1-ycCLkwShMRD4R=4jGDYHQ@mail.gmail.com Signed-off-by:
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Arnd Bergmann authored
Merge tag 'v5.20-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt NFC flash node on rk3066a-mk808 and some dts styling fixes (alignment and node names). * tag 'v5.20-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: correct gpio-keys properties on rk3288-tinker ARM: dts: rockchip: align gpio-key node names with dtschema ARM: dts: rockchip: adjust whitespace around '=' ARM: dts: rockchip: enable nfc node in rk3066a-mk808.dts Link: https://lore.kernel.org/r/14795241.VsHLxoZxqI@phil Signed-off-by:
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Arnd Bergmann authored
Merge tag 'v5.20-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt New board the Radxa Rock Pi S, enablement of graphics support and hdmi-audio on rk356x in general plus necessary board-specific changes on Rock-3A, Quartz64-A, rk3568-evb, BPI-R2-Pro. A number of additional peripherals on BPI-R2-Pro (gpu, thermal, rtc) and PCIe2x1 support on rk3568 and enablement on Quart64-A as well as a number of additional peripherals to this board (sfc node, sdr-104 support, fan). And finally touch panel support for rockpro64 and some misc dt cleanups (node names for dtschema and styling). * tag 'v5.20-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (27 commits) arm64: dts: rockchip: enable hdmi tx audio on rock-3a arm64: dts: rockchip: enable hdmi tx audio on rk3568-evb1-v10 arm64: dts: rockchip: align gpio-key node names with dtschema arm64: dts: rockchip: rock-pi-s add more peripherals arm64: dts: rockchip: add ROCK Pi S DTS support dt-bindings: arm: rockchip: Add Radxa ROCK Pi S arm64: dts: rockchip: Add missing space around regulator-name on rk3368-orion-r68 arm64: dts: rockchip: enable the gpu on BPI-R2-Pro arm64: dts: rockchip: configure thermal shutdown for BPI-R2-Pro arm64: dts: rockchip: Enable HDMI audio on BPI R2 Pro arm64: dts: rockchip: enable vop2 and hdmi tx on BPI-R2-Pro arm64: dts: rockchip: set display regulators to always-on on BPI-R2-Pro arm64: dts: rockchip: add RTC to BPI-R2 Pro arm64: dts: rockchip: Enable HDMI audio on Quartz64 A arm64: dts: rockchip: Add HDMI audio nodes to rk356x arm64: dts: rockchip: adjust whitespace around '=' arm64: dts: rockchip: enable vop2 and hdmi tx on rock-3a arm64: dts: rockchip: enable vop2 and hdmi tx on quartz64a arm64: dts: rockchip: rk3568-evb: Enable VOP2 and hdmi arm64: dts: rockchip: rk356x: Add HDMI nodes ... Link: https://lore.kernel.org/r/40088956.J2Yia2DhmK@phil Signed-off-by:
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- Jul 05, 2022
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Marek Vasut authored
Add DT bindings for ST MIPID02 and DCMI to Avenger96 base DT. Both the ST MIPID02 and DCMI are disabled by default, as the AV96 camera module is optional. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by:
Alexandre Torgue <alexandre.torgue@foss.st.com>
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Marek Vasut authored
Add another mux option for RCC pin, this is used on AV96 board for e.g. sensor clock supply. Signed-off-by:
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Marek Vasut authored
Add another mux option for DCMI pins, this is used on AV96 board. Signed-off-by:
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Marek Vasut authored
Add DT for DH DRC Compact unit, which is a universal controller device. The system has two ethernet ports, one CAN, RS485 and RS232, USB, uSD card slot, eMMC and SDIO Wi-Fi. Signed-off-by:
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Marek Vasut authored
Add another mux option for UART5 pins, this is used on DRC Compact board. Signed-off-by:
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Marek Vasut authored
Add another mux option for UART4 pins, this is used on DRC Compact board. Signed-off-by:
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Marek Vasut authored
Add another mux option for UART3 pins, this is used on DRC Compact board. Signed-off-by:
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Marek Vasut authored
Add another mux option for SPI2 pins, this is used on DRC Compact board. Signed-off-by:
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Marek Vasut authored
Add another mux option for CAN1 pins, this is used on DRC Compact board. Signed-off-by:
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Marek Vasut authored
Add DT compatible string for DH electronics STM32MP15xx DHCOR on DRC Compact carrier board into YAML DT binding document. This system is a general purpose DIN Rail Controller design. Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Marek Vasut authored
Those pin comments refer to SPI2 pins, not SPI1 pins, update the comments. No functional change. Signed-off-by:
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Herve Codina authored
Add UDPHS (the USB High Speed Device Port controller) support. The both lan966x SOCs (LAN9662 and LAN9668) have the same UDPHS IP. This IP is also the same as the one present in the SAMA5D3 SOC. Signed-off-by:
Herve Codina <herve.codina@bootlin.com> Signed-off-by:
Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220704102845.168438-4-herve.codina@bootlin.com
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Herve Codina authored
The USB device controller available in the Microchip LAN9662 SOC is the same IP as the one present in the SAMA5D3 SOC. Add the LAN9662 compatible string and set the SAMA5D3 compatible string as a fallback for the LAN9662. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
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Gabriel Fernandez authored
Add the static OP-TEE reserved memory regions. Signed-off-by:
Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by:
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Gabriel Fernandez authored
Enables Reset and Clocks Controller on STM32MP13 Signed-off-by:
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Gabriel Fernandez authored
Enable optee and SCMI clocks support. Signed-off-by:
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Alexandre Torgue authored
Like for stm32mp15, when stm32 RCC node is used to interact with a secure context (using clock SCMI protocol), a different path has to be used for yaml verification. Signed-off-by:
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Leonard Göhrs authored
According to the OSD32MP1 Power System overview[1] the EEPROM is connected to the VDD line and not to some single-purpose fixed regulator. Set the EEPROM supply according to the diagram to eliminate this parent-less regulator. [1]: https://octavosystems.com/app_notes/osd32mp1-power-system-overview/#connections Signed-off-by:
Leonard Göhrs <l.goehrs@pengutronix.de> Acked-by:
Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by:
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Leonard Göhrs authored
According to the OSD32MP1 Power System overview[1] ldo3's input is always internally connected to vdd_ddr. [1]: https://octavosystems.com/app_notes/osd32mp1-power-system-overview/#connections Signed-off-by:
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Krzysztof Kozlowski authored
Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by:
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Marek Vasut authored
The Buck3 on DHCOR is used to supply IO voltage. It can output either 3V3 in the default DHCOR configuration, or 2V9 in case of AV96 DHCOR variant which has extra Empirion DCDC converter in front of the 1V8 IO supply, or outright 1V8 in case of 1V8 IO DHCOR without the Empirion DCDC converter. The 2V9 mode in case of AV96 DHCOR variant is used to reduce unnecessarily high input voltage to the Empirion DCDC converter, so move it into matching DTSI to stop confusing users. Signed-off-by:
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Fabien Dessenne authored
The stm32 ipcc mailbox driver supports only two interrupts (rx and tx), so remove the unsupported "wakeup" one. Note that the EXTI interrupt 61 has two roles : it is hierarchically linked to the GIC IPCC "rx" interrupt, and it acts as a wakeup source. Signed-off-by:
Fabien Dessenne <fabien.dessenne@foss.st.com> Signed-off-by:
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Kavyasree Kotagiri authored
On pcb8291, Flexcom3 usart has only tx and rx pins. Cleaningup usart3 pinctrl settings. Signed-off-by:
Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com> Acked-by:
Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by:
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Linus Walleij authored
This regulator supply is replaced by the proper power domain. Reported-by:
Linus Walleij <linus.walleij@linaro.org>
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- Jul 04, 2022
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Michael Riesch authored
Enable the I2S0 controller and the hdmi-sound node on the Radxa ROCK3 Model A. Signed-off-by:
Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20220614230354.3756364-2-michael.riesch@wolfvision.net Signed-off-by:
Heiko Stuebner <heiko@sntech.de>
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Michael Riesch authored
Enable the I2S0 controller and the hdmi-sound node on the Rockchip RK3568 EVB1. Signed-off-by:
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Arnd Bergmann authored
Merge tag 'omap-for-v5.20/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt Devicetree changes omaps for v5.20 merge window Just one devicetree change to add EEPROM regulator for BeagleBone Black. * tag 'omap-for-v5.20/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: am33xx: Map baseboard EEPROM on BeagleBone Black Link: https://lore.kernel.org/r/pull-1656918942-515224@atomide.com Signed-off-by:
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Fabrice Gasnier authored
The USBH composed of EHCI and OHCI controllers needs the PHY clock to be initialized first, before enabling (gating) them. The reverse is also required when going to suspend. So, add USBPHY clock as 1st entry in both controllers, so the USBPHY PLL gets enabled 1st upon controller init. Upon suspend/resume, this also makes the clock to be disabled/re-enabled in the correct order. This fixes some IRQ storm conditions seen when going to low-power, due to PHY PLL being disabled before all clocks are cleanly gated. Fixes: 949a0c0d ("ARM: dts: stm32: add USB Host (USBH) support to stm32mp157c") Fixes: db7be2cb ("ARM: dts: stm32: use usbphyc ck_usbo_48m as USBH OHCI clock on stm32mp151") Signed-off-by:
Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by:
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Gabriel Fernandez authored
Delete the node fixed clock managed by secure world with SCMI. Signed-off-by:
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Gabriel Fernandez authored
LSE clock is provided by SCMI. Signed-off-by:
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Gabriel Fernandez authored
The peripheral clock of CEC is not LSE but CEC. Signed-off-by:
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Etienne Carriere authored
Fixes stm32mp15*-scmi DTS files introduced in [1] to also access PWR regulators through SCMI service. This is needed since enabling secure only access to RCC clock and reset controllers also enables secure access only on PWR voltage regulators reg11, reg18 and usb33 hence these must also be accessed through SCMI Voltage Domain protocol. This change applies on commit [2] that already corrects issues from commit [1]. Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Link: [1] https://lore.kernel.org/linux-arm-kernel/20220422150952.20587-7-alexandre.torgue@foss.st.com Link: [2] https://lore.kernel.org/linux-arm-kernel/20220613071920.5463-1-alexandre.torgue@foss.st.com Signed-off-by:
Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by:
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Kavyasree Kotagiri authored
Add the mcan1 node. By default, keep it disabled. Signed-off-by:
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