Unverified Commit 888c173e authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'stm32-dt-for-v5.20-1' of... 

Merge tag 'stm32-dt-for-v5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT for v5.20, round 1

Highlights:
----------

- MCU:
  -Fix whitespace coding style. No functional changes.

- MPU:
  - General:
    - Remove specific IPCC wakeup interrupt on STM32MP15.
    - Enable OPTEE firmware and scmi support (clock/reset) on
      STM32MP13. It allows to enable RCC clock driver.
    - Add new pins configurations groups.

  - DH boards:
    - Add DHCOR based DRC Compact board. It embeds: 2xETH, 1xCAN,
      uSD, USB, eMMC and SDIO wifi.
    - Add ST MIPID02 bindings to AV96 (not enabled by default)

  - OSD32:
    - Correct vcc-supply for eeprom.
    - fix missing internally connected voltage regulator (ldo3
      supplied by vdd_ddr).

* tag 'stm32-dt-for-v5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (25 commits)
  ARM: dts: stm32: Add ST MIPID02 bindings to AV96
  ARM: dts: stm32: Add alternate pinmux for RCC pin
  ARM: dts: stm32: Add alternate pinmux for DCMI pins
  ARM: dts: stm32: Add DHCOR based DRC Compact board
  ARM: dts: stm32: Add alternate pinmux for UART5 pins
  ARM: dts: stm32: Add alternate pinmux for UART4 pins
  ARM: dts: stm32: Add alternate pinmux for UART3 pins
  ARM: dts: stm32: Add alternate pinmux for SPI2 pins
  ARM: dts: stm32: Add alternate pinmux for CAN1 pins
  dt-bindings: arm: stm32: Add compatible string for DH electronics DHCOR DRC Compact
  ARM: dts: stm32: Fix SPI2 pinmux pin comments on stm32mp15
  ARM: dts: stm32: add optee reserved memory on stm32mp135f-dk
  ARM: dts: stm32: add RCC on STM32MP13x SoC family
  ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP13
  dt-bindings: rcc: stm32: select the "secure" path for stm32mp13
  ARM: dts: stm32: correct vcc-supply for eeprom on stm32mp15xx-osd32
  ARM: dts: stm32: fix missing internally connected voltage regulator for OSD32MP1
  ARM: dts: stm32: adjust whitespace around '=' on MCU boards
  ARM: dts: stm32: Move DHCOR BUCK3 VDD 2V9 adjustment to 1V8 DTSI
  ARM: dts: stm32: remove the IPCC "wakeup" IRQ on stm32mp151
  ...

Link: https://lore.kernel.org/r/a250f32b-f67c-2922-0748-e39dc791e95c@foss.st.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 5b98b402 cc6280cf

Documentation/devicetree/bindings/arm/stm32/stm32.yaml

+7 −1
Original line number Diff line number Diff line
@@ -59,12 +59,18 @@ properties: 
              - prt,prtt1s   # Protonic PRTT1S

          - const: st,stm32mp151



      - description: DH STM32MP153 SoM based Boards

      - description: DH STM32MP153 DHCOM SoM based Boards

        items:

          - const: dh,stm32mp153c-dhcom-drc02

          - const: dh,stm32mp153c-dhcom-som

          - const: st,stm32mp153



      - description: DH STM32MP153 DHCOR SoM based Boards

        items:

          - const: dh,stm32mp153c-dhcor-drc-compact

          - const: dh,stm32mp153c-dhcor-som

          - const: st,stm32mp153



      - items:

          - enum:

              - shiratech,stm32mp157a-iot-box # IoT Box

Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.yaml

+1 −0
Original line number Diff line number Diff line
@@ -78,6 +78,7 @@ if: 
      contains:

        enum:

          - st,stm32mp1-rcc-secure

          - st,stm32mp13-rcc

then:

  properties:

    clocks:

arch/arm/boot/dts/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -1192,6 +1192,7 @@ dtb-$(CONFIG_ARCH_STM32) += \ 
	stm32mp151a-prtt1c.dtb \

	stm32mp151a-prtt1s.dtb \

	stm32mp153c-dhcom-drc02.dtb \

	stm32mp153c-dhcor-drc-compact.dtb \

	stm32mp157a-avenger96.dtb \

	stm32mp157a-dhcor-avenger96.dtb \

	stm32mp157a-dk1.dtb \

arch/arm/boot/dts/stm32mp131.dtsi

+72 −68
Original line number Diff line number Diff line
@@ -4,6 +4,8 @@ 
 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.

 */

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/clock/stm32mp13-clks.h>

#include <dt-bindings/reset/stm32mp13-resets.h>



/ {

	#address-cells = <1>;
@@ -27,59 +29,28 @@ arm-pmu { 
		interrupt-parent = <&intc>;

	};



	clocks {

		clk_axi: clk-axi {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <266500000>;

		};



		clk_hse: clk-hse {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <24000000>;

		};



		clk_hsi: clk-hsi {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <64000000>;

		};



		clk_lsi: clk-lsi {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <32000>;

		};



		clk_pclk3: clk-pclk3 {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <104438965>;

	firmware {

		optee {

			method = "smc";

			compatible = "linaro,optee-tz";

		};



		clk_pclk4: clk-pclk4 {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <133250000>;

		};

		scmi: scmi {

			compatible = "linaro,scmi-optee";

			#address-cells = <1>;

			#size-cells = <0>;

			linaro,optee-channel-id = <0>;

			shmem = <&scmi_shm>;



		clk_pll4_p: clk-pll4_p {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <50000000>;

			scmi_clk: protocol@14 {

				reg = <0x14>;

				#clock-cells = <1>;

			};



		clk_pll4_r: clk-pll4_r {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <99000000>;

			scmi_reset: protocol@16 {

				reg = <0x16>;

				#reset-cells = <1>;

			};



		clk_rtc_k: clk-rtc-k {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <32768>;

		};

	};
@@ -113,11 +84,25 @@ soc { 
		interrupt-parent = <&intc>;

		ranges;



		scmi_sram: sram@2ffff000 {

			compatible = "mmio-sram";

			reg = <0x2ffff000 0x1000>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0x2ffff000 0x1000>;



			scmi_shm: scmi-sram@0 {

				compatible = "arm,scmi-shmem";

				reg = <0 0x80>;

			};

		};



		uart4: serial@40010000 {

			compatible = "st,stm32h7-uart";

			reg = <0x40010000 0x400>;

			interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk_hsi>;

			clocks = <&rcc UART4_K>;

			resets = <&rcc UART4_R>;

			status = "disabled";

		};
@@ -132,7 +117,8 @@ dma1: dma-controller@48000000 { 
				     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk_pclk4>;

			clocks = <&rcc DMA1>;

			resets = <&rcc DMA1_R>;

			#dma-cells = <4>;

			st,mem2mem;

			dma-requests = <8>;
@@ -149,7 +135,8 @@ dma2: dma-controller@48001000 { 
				     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk_pclk4>;

			clocks = <&rcc DMA2>;

			resets = <&rcc DMA2_R>;

			#dma-cells = <4>;

			st,mem2mem;

			dma-requests = <8>;
@@ -158,13 +145,27 @@ dma2: dma-controller@48001000 { 
		dmamux1: dma-router@48002000 {

			compatible = "st,stm32h7-dmamux";

			reg = <0x48002000 0x40>;

			clocks = <&clk_pclk4>;

			clocks = <&rcc DMAMUX1>;

			resets = <&rcc DMAMUX1_R>;

			#dma-cells = <3>;

			dma-masters = <&dma1 &dma2>;

			dma-requests = <128>;

			dma-channels = <16>;

		};



		rcc: rcc@50000000 {

			compatible = "st,stm32mp13-rcc", "syscon";

			reg = <0x50000000 0x1000>;

			#clock-cells = <1>;

			#reset-cells = <1>;

			clock-names = "hse", "hsi", "csi", "lse", "lsi";

			clocks = <&scmi_clk CK_SCMI_HSE>,

				 <&scmi_clk CK_SCMI_HSI>,

				 <&scmi_clk CK_SCMI_CSI>,

				 <&scmi_clk CK_SCMI_LSE>,

				 <&scmi_clk CK_SCMI_LSI>;

		};



		exti: interrupt-controller@5000d000 {

			compatible = "st,stm32mp13-exti", "syscon";

			interrupt-controller;
@@ -175,14 +176,14 @@ exti: interrupt-controller@5000d000 { 
		syscfg: syscon@50020000 {

			compatible = "st,stm32mp157-syscfg", "syscon";

			reg = <0x50020000 0x400>;

			clocks = <&clk_pclk3>;

			clocks = <&rcc SYSCFG>;

		};



		mdma: dma-controller@58000000 {

			compatible = "st,stm32h7-mdma";

			reg = <0x58000000 0x1000>;

			interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk_pclk4>;

			clocks = <&rcc MDMA>;

			#dma-cells = <5>;

			dma-channels = <32>;

			dma-requests = <48>;
@@ -194,8 +195,9 @@ sdmmc1: mmc@58005000 { 
			reg = <0x58005000 0x1000>, <0x58006000 0x1000>;

			interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "cmd_irq";

			clocks = <&clk_pll4_p>;

			clocks = <&rcc SDMMC1_K>;

			clock-names = "apb_pclk";

			resets = <&rcc SDMMC1_R>;

			cap-sd-highspeed;

			cap-mmc-highspeed;

			max-frequency = <130000000>;
@@ -208,8 +210,9 @@ sdmmc2: mmc@58007000 { 
			reg = <0x58007000 0x1000>, <0x58008000 0x1000>;

			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "cmd_irq";

			clocks = <&clk_pll4_p>;

			clocks = <&rcc SDMMC2_K>;

			clock-names = "apb_pclk";

			resets = <&rcc SDMMC2_R>;

			cap-sd-highspeed;

			cap-mmc-highspeed;

			max-frequency = <130000000>;
@@ -219,7 +222,7 @@ sdmmc2: mmc@58007000 { 
		iwdg2: watchdog@5a002000 {

			compatible = "st,stm32mp1-iwdg";

			reg = <0x5a002000 0x400>;

			clocks = <&clk_pclk4>, <&clk_lsi>;

			clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;

			clock-names = "pclk", "lsi";

			status = "disabled";

		};
@@ -228,7 +231,8 @@ rtc: rtc@5c004000 { 
			compatible = "st,stm32mp1-rtc";

			reg = <0x5c004000 0x400>;

			interrupts-extended = <&exti 19 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk_pclk4>, <&clk_rtc_k>;

			clocks = <&scmi_clk CK_SCMI_RTCAPB>,

				 <&scmi_clk CK_SCMI_RTC>;

			clock-names = "pclk", "rtc_ck";

			status = "disabled";

		};
@@ -269,7 +273,7 @@ gpioa: gpio@50002000 { 
				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x0 0x400>;

				clocks = <&clk_pclk4>;

				clocks = <&rcc GPIOA>;

				st,bank-name = "GPIOA";

				ngpios = <16>;

				gpio-ranges = <&pinctrl 0 0 16>;
@@ -281,7 +285,7 @@ gpiob: gpio@50003000 { 
				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x1000 0x400>;

				clocks = <&clk_pclk4>;

				clocks = <&rcc GPIOB>;

				st,bank-name = "GPIOB";

				ngpios = <16>;

				gpio-ranges = <&pinctrl 0 16 16>;
@@ -293,7 +297,7 @@ gpioc: gpio@50004000 { 
				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x2000 0x400>;

				clocks = <&clk_pclk4>;

				clocks = <&rcc GPIOC>;

				st,bank-name = "GPIOC";

				ngpios = <16>;

				gpio-ranges = <&pinctrl 0 32 16>;
@@ -305,7 +309,7 @@ gpiod: gpio@50005000 { 
				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x3000 0x400>;

				clocks = <&clk_pclk4>;

				clocks = <&rcc GPIOD>;

				st,bank-name = "GPIOD";

				ngpios = <16>;

				gpio-ranges = <&pinctrl 0 48 16>;
@@ -317,7 +321,7 @@ gpioe: gpio@50006000 { 
				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x4000 0x400>;

				clocks = <&clk_pclk4>;

				clocks = <&rcc GPIOE>;

				st,bank-name = "GPIOE";

				ngpios = <16>;

				gpio-ranges = <&pinctrl 0 64 16>;
@@ -329,7 +333,7 @@ gpiof: gpio@50007000 { 
				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x5000 0x400>;

				clocks = <&clk_pclk4>;

				clocks = <&rcc GPIOF>;

				st,bank-name = "GPIOF";

				ngpios = <16>;

				gpio-ranges = <&pinctrl 0 80 16>;
@@ -341,7 +345,7 @@ gpiog: gpio@50008000 { 
				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x6000 0x400>;

				clocks = <&clk_pclk4>;

				clocks = <&rcc GPIOG>;

				st,bank-name = "GPIOG";

				ngpios = <16>;

				gpio-ranges = <&pinctrl 0 96 16>;
@@ -353,7 +357,7 @@ gpioh: gpio@50009000 { 
				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x7000 0x400>;

				clocks = <&clk_pclk4>;

				clocks = <&rcc GPIOH>;

				st,bank-name = "GPIOH";

				ngpios = <15>;

				gpio-ranges = <&pinctrl 0 112 15>;
@@ -365,7 +369,7 @@ gpioi: gpio@5000a000 { 
				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x8000 0x400>;

				clocks = <&clk_pclk4>;

				clocks = <&rcc GPIOI>;

				st,bank-name = "GPIOI";

				ngpios = <8>;

				gpio-ranges = <&pinctrl 0 128 8>;

arch/arm/boot/dts/stm32mp133.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -15,7 +15,7 @@ m_can1: can@4400e000 { 
			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "int0", "int1";

			clocks = <&clk_hse>, <&clk_pll4_r>;

			clocks = <&scmi_clk CK_SCMI_HSE>, <&rcc FDCAN_K>;

			clock-names = "hclk", "cclk";

			bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;

			status = "disabled";
@@ -28,7 +28,7 @@ m_can2: can@4400f000 { 
			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "int0", "int1";

			clocks = <&clk_hse>, <&clk_pll4_r>;

			clocks = <&scmi_clk CK_SCMI_HSE>, <&rcc FDCAN_K>;

			clock-names = "hclk", "cclk";

			bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;

			status = "disabled";