- Jul 11, 2022
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linuxArnd Bergmann authored
i.MX device tree change for 5.20: - A series from Alexander Stein to fix some i.MX6UL dt_binding_check warnings. - Replace deprecated 'enable-sdio-wakeup' property with 'wakeup-source' for a couple of boards. - A set of imx7-colibri device tree updates from Marcel Ziswiler to improve devices Display, Touch, Ethernet and SD/MMC, and also adds Toradex Iris carrier board. - A few improvements on imx6qdl-colibri board, correct SGTL5000 MCLK handling, simplify handling of inverted PWM backlight. - A series from Max Krummenacher (and Oleksandr Suvorov) to improve the existing i.MX6 Apalis carrier board device trees and adds a new device tree for the Ixora V1.2 carrier board. - Add USB dual-role switching using extcon for imx7-colibri board. - Add SFP node for TA 2.1 devices for LayerScape SoCs. - Other small and random updates on various boards. * tag 'imx-dt-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (61 commits) ARM: dts: layerscape: Add SFP node for TA 2.1 devices ARM: dts: imx6qdl-prti6q.dtsi: Add applicable properties to usdhc3 ARM: dts: imx6q-bosch-acc: Replace 'enable-sdio-wakeup' ARM: dts: imx7d-smegw01: Replace 'enable-sdio-wakeup' ARM: dts: imx6q-apalis: Cleanup ARM: dts: imx6q-apalis: backlight pwm: Adapt brightness steps ARM: dts: imx6q-apalis: backlight pwm: Simplify inverted backlight ARM: dts: imx6q-apalis: Add support for Toradex Ixora V1.2 carrier boards ARM: dts: imx6q-apalis: Clean-up sd card support ARM: dts: imx6q-apalis: Add adv7280 video input ARM: dts: imx6q-apalis: Add ov5640 mipi csi camera ARM: dts: imx6q-apalis: Disable stmpe touchscreen ARM: dts: imx6q-apalis: Disable HDMI ARM: dts: imx6q-apalis: Add LVDS panel support ARM: dts: imx6q-apalis: move gpio-keys to SoM dtsi ARM: dts: imx6q-apalis: Move Atmel MXT touch ctrl to SoM dtsi ARM: dts: imx6q-apalis: Move pinmux groups to SoM dtsi ARM: dts: imx6q-apalis: Move parallel rgb interface to SoM dtsi ARM: dts: imx6q-apalis: Command pmic to standby for poweroff ARM: dts: imx6q-apalis: Add gpio-line-names ... Link: https://lore.kernel.org/r/20220709082951.15123-4-shawnguo@kernel.org Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'imx-bindings-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX DT bindings update for 5.20: - Compatibles for new boards: i.MX7 based Toradex Colibri, DH electronics i.MX8M Plus DHCOM and PDK2, TQMa8MPxL, Carrier for Toradex i.MX6 Apalis, i.MX93 EVK, PHYTEC i.MX8MM based board. - A series from Abel Vesa (and Viorel Suman) to split fsl,scu.txt bindings into multiple subsystem bindings in yaml format. - Fix 'line too long' warning caused by Toradex Colibri boards. * tag 'imx-bindings-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: dt-bindings: arm: add TQMa8MPxL board dt-bindings: firmware: Add fsl,scu yaml file dt-bindings: watchdog: Add fsl,scu-wdt yaml file dt-bindings: thermal: Add fsl,scu-thermal yaml file dt-bindings: rtc: Add fsl,scu-rtc yaml file dt-bindings: power: Add fsl,scu-pd yaml file dt-bindings: nvmem: Add fsl,scu-ocotp yaml file dt-bindings: input: Add fsl,scu-key yaml file dt-bindings: pinctrl: imx: Add fsl,scu-iomux yaml file dt-bindings: clk: imx: Add fsl,scu-clk yaml file bindings: arm: fsl: Add PHYTEC i.MX8MM devicetree bindings dt-bindings: arm: fsl: Add carrier for toradex,apalis-imx6q dt-bindings: arm: fsl: Decrease the line length dt-bindings: arm: Add DH electronics i.MX8M Plus DHCOM and PDK2 dt-bindings: arm: fsl: add toradex,colibri-imx7s/d/d-emmc-iris/-v2 dt-bindings: arm: fsl: add imx93 11x11 evk board dt-bindings: arm: fsl: correct 1g vs. 1gb in toradex,colibri-imx6ull-* Link: https://lore.kernel.org/r/20220709082951.15123-3-shawnguo@kernel.org Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'ti-keystone-dt-for-v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/dt Keystone2 device tree updates for v5.20 * Whitespace cleanups. * tag 'ti-keystone-dt-for-v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: ARM: dts: keystone: Adjust whitespace around '=' Link: https://lore.kernel.org/r/20220708232709.rrpzbrpv7jbipyym@eldest Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'ti-k3-dt-for-v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/dt TI K3 device tree updates for v5.20 * AM62: fixups, sa2ul enabled, ramoops for sk * others: whitespace and gpio-key cleanup. * tag 'ti-k3-dt-for-v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: arm64: dts: ti: k3-am62-main: Enable crypto accelerator arm64: dts: ti: k3-am625-sk: Enable ramoops arm64: dts: ti: k3-am642-sk: Add pinmux corresponding to main_uart0 arm64: dts: ti: Align gpio-key node names with dtschema arm64: dts: ti: Adjust whitespace around '=' Link: https://lore.kernel.org/r/20220708232701.vpk45lwogpasaaay@enchilada Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'tegra-for-5.20-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt arm64: tegra: Device tree changes for v5.20-rc1 This adds and enables various hardware on Tegra234 (host1x, VIC, GPCDMA) as well as the Control BackBone related device tree nodes on Tegra194 and Tegra234. Native timers are enabled on Tegra186, Tegra194 and Tegra234, which allow keeping track of SoC-wide timestamps as well as hardware watchdog functionality. The audio subsystem is enhanced with the Output Processing Engine (OPE) on Tegra210 and later. Finally there are a handful of minor cleanups and fixes. * tag 'tegra-for-5.20-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Fix SDMMC1 CD on P2888 arm64: tegra: Update compatible for Tegra234 GPCDMA arm64: tegra: Add Host1x and VIC on Tegra234 arm64: tegra: Add Host1x context stream IDs on Tegra186+ arm64: tegra: Enable native timers on Tegra234 arm64: tegra: Enable native timers on Tegra194 arm64: tegra: Enable native timers on Tegra186 arm64: tegra: Add node for CBB 2.0 on Tegra234 arm64: tegra: Add node for CBB 1.0 on Tegra194 arm64: tegra: Align gpio-keys node names with dtschema arm64: tegra: Mark BPMP channels as no-memory-wc arm64: tegra: Add Tegra234 GPCDMA device tree node arm64: tegra: Adjust whitespace around '=' arm64: tegra: Enable OPE on various platforms arm64: tegra: Add OPE device on Tegra210 and later Link: https://lore.kernel.org/r/20220708185608.676474-7-thierry.reding@gmail.com Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'tegra-for-5.20-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt ARM: tegra: Device tree changes for v5.20-rc1 Two minor fixes to help reduce the noise from the DT validation tooling. * tag 'tegra-for-5.20-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra: Align gpio-keys node names with dtschema ARM: tegra: Adjust whitespace around '=' Link: https://lore.kernel.org/r/20220708185608.676474-6-thierry.reding@gmail.com Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'tegra-for-5.20-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt dt-bindings: Changes for v5.20-rc1 These changes add clock, reset, memory client and power domain definitions for various devices found on Tegra234 along with a few device tree bindings for new hardware. * tag 'tegra-for-5.20-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: tegra-ccplex-cluster: Remove status from required properties dt-bindings: Add headers for Host1x and VIC on Tegra234 dt-bindings: timer: Add Tegra186 & Tegra234 Timer dt-bindings: arm: tegra: Add NVIDIA Tegra234 CBB 2.0 binding dt-bindings: arm: tegra: Add NVIDIA Tegra194 AXI2APB binding dt-bindings: arm: tegra: Add NVIDIA Tegra194 CBB 1.0 binding dt-bindings: memory: Add Tegra234 MGBE memory clients dt-bindings: Add Tegra234 MGBE clocks and resets dt-bindings: power: Add Tegra234 MGBE power domains dt-bindings: Add headers for Tegra234 GPCDMA Link: https://lore.kernel.org/r/20220708185608.676474-4-thierry.reding@gmail.com Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'sunxi-dt-for-5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt - whitespace fixes - replaced RTC indexes with constants - gpio-key nodes aligned with dtschema - fixed LED node for Orange Pi Win - added OPP table for R40 CPU and thermal points - updated I2C controller compatibles - added compatibles for MBUS, D1 DE2 clocks, D1 USB - enable internal HMIC bias on Pinephone * tag 'sunxi-dt-for-5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: arm64: dts: allwinner: pinephone: Enable internal HMIC bias dt-bindings: arm: sunxi: Add several MBUS compatibles dt-bindings: arm: sunxi: Default to the full MBUS binding dt-bindings: usb: generic-ohci: Add Allwinner D1 compatible dt-bindings: usb: generic-ehci: Add Allwinner D1 compatible dt-bindings: usb: sunxi-musb: Add Allwinner D1 compatible arm64: dts: allwinner: a100: Update I2C controller fallback dt-bindings: i2c: mv64xxx: Add variants with offload support ARM: dts: sun8i-r40: Add thermal trip points/cooling maps ARM: dts: sun8i-r40: add opp table for cpu ARM: dts: sun8i-r40: Add "cpu-supply" node for sun8i-r40 based board arm64: dts: allwinner: a64: orangepi-win: Fix LED node name dt-bindings: clock: Add compatible for D1 DE2 clocks ARM: dts: allwinner: align gpio-key node names with dtschema arm64: dts: allwinner: align gpio-key node names with dtschema arm64: dts: allwinner: Use constants for RTC clock indexes ARM: dts: sunxi: Use constants for RTC clock indexes ARM: dts: sun5i: adjust whitespace around '=' Link: https://lore.kernel.org/r/Ysh8qRH0Q5Xv9Qhf@kista.localdomain Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'v5.19-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt Some fixes to follow DT spec. MT6795: - Big update of supported devices: cpu-map, L2 cache, PMU, watchdog, MediaTek timer, Arm CCI, pincontroller MT7622: - Change WPS button to active low MT8173: - Add infracfg property to the IOMMU node (also for mt2712e) - Add optional AXI clock to NOR Flash node MT8183: - add Medaitek CCI support - add support for Smart Voltag Scaling (SVS) - add GCE support to mutex - Add panel default rotation to some chromebooks - Add power supply to power domain so that SRAM for the GPU has power MT8186: - compatible added, DTS not yet ready. MT8192: - Add support for Acer Chromebook 514 MT8195: - Add efuse node - Enable USB wakeup support - Add support for Acer Chromebook Spin 513 * tag 'v5.19-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (66 commits) arm64: dts: mt8183: Add panel rotation arm64: dts: mt7622: fix BPI-R64 WPS button arm64: dts: mt8173: Fix nor_flash node arm64: dts: mediatek: cherry: Add I2C-HID touchscreen on I2C4 arm64: dts: mediatek: cherry: Enable support for the SPI NOR flash arm64: dts: mediatek: cherry: Enable MT6360 sub-pmic on I2C7 arm64: dts: mediatek: cherry: Enable T-PHYs and USB XHCI controllers arm64: dts: mediatek: cherry: Enable I2C and SPI controllers arm64: dts: mediatek: cherry: Document gpios and add default pin config arm64: dts: mediatek: cherry: Add support for internal eMMC storage arm64: dts: mediatek: cherry: Assign interrupt line to MT6359 PMIC arm64: dts: mediatek: cherry: Add platform regulators layout and config arm64: dts: mediatek: Introduce MT8195 Cherry platform's Tomato dt-bindings: arm: mediatek: Add MT8195 Cherry Tomato Chromebooks arm64: dts: mediatek: asurada: Add SPI NOR flash memory arm64: dts: mediatek: asurada: Enable SCP arm64: dts: mediatek: asurada: Enable MMC arm64: dts: mediatek: asurada: Add SPMI regulators arm64: dts: mediatek: asurada: Add MT6359 PMIC arm64: dts: mediatek: asurada: Enable PCIe and add WiFi ... Link: https://lore.kernel.org/r/b0d5b584-2693-73b3-79f6-3e2292f006ea@gmail.com Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'v5.19-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt Airoha EN7523: - Add clock and PCIe support Several style fixes to comply with DT spec. * tag 'v5.19-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: ARM: dts: mediatek: align gpio-key node names with dtschema ARM: dts: mediatek: adjust whitespace around '=' ARM: dts: Add PCIe support for Airoha EN7523 ARM: dts: add clock support for Airoha EN7523 Link: https://lore.kernel.org/r/63536da6-fbe4-2d96-ab91-ae756cd580c4@gmail.com Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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- Jul 09, 2022
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Markus Niebel authored
TQMa8MPxL is a SOM family using NXP i.MX8MP CPU family MBa8MPxL is an evaluation mainbord for this SOM The SOM needs a mainboard, therefore we provide two compatibles here: "tq,imx8mp-<SOM>" for the module and "tq,imx8mp-<SOM>-<SBC>" Signed-off-by:
Markus Niebel <Markus.Niebel@tq-group.com> Signed-off-by:
Alexander Stein <alexander.stein@ew.tq-group.com> Acked-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Samuel Holland authored
Revisions 1.0 and 1.1 of the PinePhone mainboard do not have an external resistor connecting HBIAS to MIC2P. Enable the internal resistor to provide the necessary headeset microphone bias. Signed-off-by:
Samuel Holland <samuel@sholland.org> Reviewed-by:
Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by:
Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220621035452.60272-4-samuel@sholland.org
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Samuel Holland authored
All of the sunxi SoCs since at least the A33 have a similar structure for the MBUS and DRAM controller, but they all have minor differences in MBUS port assignments and DRAM controller behavior. Give each SoC its own compatible. Signed-off-by:
Samuel Holland <samuel@sholland.org> Acked-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220702042447.26734-2-samuel@sholland.org
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Samuel Holland authored
Some older SoCs use a deprecated MBUS binding with some clocks missing. Currently, new SoCs must opt in to the complete binding. This should be the default, so new SoCs do not accidentally use the deprecated version. Signed-off-by:
Samuel Holland <samuel@sholland.org> Acked-by:
Rob Herring <robh@kernel.org> Reviewed-by:
Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by:
Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220702042447.26734-1-samuel@sholland.org
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Tamás Szűcs authored
Hook SDMMC1 CD up with CVM GPIO02 (SOC_GPIO11) used for card detection on J4 (uSD socket) on the carrier. Fixes: ef633bfc ("arm64: tegra: Enable card detect for SD card on P2888") Signed-off-by:
Tamás Szűcs <tszucs@protonmail.ch> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Akhil R authored
Use the compatible specific to Tegra234 for GPCDMA to support additional features. Signed-off-by:
Akhil R <akhilrajeev@nvidia.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Mikko Perttunen authored
Add device tree nodes for Host1x and VIC on Tegra234. Signed-off-by:
Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Mikko Perttunen authored
Add Host1x context stream IDs on systems that support Host1x context isolation. Host1x and attached engines can use these stream IDs to allow isolation between memory used by different processes. The specified stream IDs must match those configured by the hypervisor, if one is present. Signed-off-by:
Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Kartik authored
The native timers IP block found on NVIDIA Tegra SoCs implements a watchdog timer that can be used to recover from system hangs. Add and enable the device tree node on Tegra234. Signed-off-by:
Kartik <kkartik@nvidia.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
The native timers IP block found on NVIDIA Tegra SoCs implements a watchdog timer that can be used to recover from system hangs. Add and enable the device tree node on Tegra194. Signed-off-by:
Thierry Reding <treding@nvidia.com> Signed-off-by:
Kartik <kkartik@nvidia.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Kartik authored
Enable the native timers on Tegra186 chips to allow using the watchdog functionality to recover from system hangs. Signed-off-by:
Kartik <kkartik@nvidia.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Sumit Gupta authored
Tegra234 uses the Control Backbone (CBB) version 2.0. Add the nodes that enable error handling from the various CBB 2.0 fabrics found on Tegra234. Signed-off-by:
Sumit Gupta <sumitg@nvidia.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Sumit Gupta authored
Add device tree nodes to enable error handling on the Control Backbone (CBB). Tegra194 uses CBB version 1.0. Signed-off-by:
Sumit Gupta <sumitg@nvidia.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Krzysztof Kozlowski authored
The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Mikko Perttunen authored
The Tegra SYSRAM contains regions access to which is restricted to certain hardware blocks on the system, and speculative accesses to those will cause issues. Patch 'misc: sram: Only map reserved areas in Tegra SYSRAM' attempted to resolve this by only mapping the regions specified in the device tree on the assumption that there are no such restricted areas within the 64K-aligned area of memory that contains the memory we wish to map. Turns out this assumption is wrong, as there are such areas above the 4K pages described in the device trees. As such, we need to use the bigger hammer that is no-memory-wc, which causes the memory to be mapped as Device memory to which speculative accesses are disallowed. As such, the previous patch in the series, 'firmware: tegra: bpmp: do only aligned access to IPC memory area', is required with this patch to make the BPMP driver only issue aligned memory accesses as those are also required with Device memory. Fixes: fec29bf0 ("misc: sram: Only map reserved areas in Tegra SYSRAM") Signed-off-by:
Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by:
Yousaf Kaukab <ykaukab@suse.de> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Akhil R authored
Add device tree nodes for Tegra234 GPCDMA Signed-off-by:
Akhil R <akhilrajeev@nvidia.com> Reviewed-by:
Jon Hunter <jonathanh@nvidia.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Krzysztof Kozlowski authored
Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Sameer Pujar authored
Enable OPE module usage on various Jetson platforms. This can be plugged into an audio path using ALSA mixer controls. Add audio-graph-port binding to use OPE device with generic audio-graph based sound card. Signed-off-by:
Sameer Pujar <spujar@nvidia.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Sameer Pujar authored
Output Processing Engine (OPE) is a client of AHUB and is present on Tegra210 and later generations of Tegra SoC. Add this device on the relevant SoC DTSI files. Signed-off-by:
Sameer Pujar <spujar@nvidia.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
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- Jul 08, 2022
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Thierry Reding authored
The "status" property is implied to be "okay" if it isn't present, so do not mark it as required. Signed-off-by:
Thierry Reding <treding@nvidia.com> Acked-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Mikko Perttunen authored
Add clock, memory controller, powergate and reset dt-binding headers for Host1x and VIC on Tegra234. Signed-off-by:
Mikko Perttunen <mperttunen@nvidia.com> Acked-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Kartik authored
The Tegra186 timer provides ten 29-bit timer counters and one 32-bit timestamp counter. The Tegra234 timer provides sixteen 29-bit timer counters and one 32-bit timestamp counter. Each NV timer selects its timing reference signal from the 1 MHz reference generated by USEC, TSC or either clk_m or OSC. Each TMR can be programmed to generate one-shot, periodic, or watchdog interrupts. Signed-off-by:
Kartik <kkartik@nvidia.com> Reviewed-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Arnd Bergmann authored
Merge tag 'renesas-dt-bindings-for-v5.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas DT binding updates for v5.20 (take two) - Miscellaneous fixes and improvements. * tag 'renesas-dt-bindings-for-v5.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: dt-bindings: hwinfo: renesas,prr: move from soc directory MAINTAINERS: Add Renesas SoC DT bindings to Renesas Architecture sections Link: https://lore.kernel.org/r/cover.1657278851.git.geert+renesas@glider.be Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'renesas-arm-dt-for-v5.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas ARM DT updates for v5.20 (take two) - Ethernet MAC and switch support for the RZ/N1 SoC on the RZN1D-DB development board, - AA1024XD12 panel overlay support for the Draak, Ebisu, and Salvator-X(S) development boards, - Miscellaneous fixes and improvements. * tag 'renesas-arm-dt-for-v5.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: dts: renesas: Add panel overlay for Draak and Ebisu boards arm64: dts: renesas: Add panel overlay for Salvator-X(S) boards arm64: dts: renesas: Prepare AA1024XD12 panel .dtsi for overlay support arm64: dts: renesas: spider-cpu: Fix scif0/scif3 sort order ARM: dts: r9a06g032-rzn1d400-db: Add switch description dt-bindings: net: pcs: add bindings for Renesas RZ/N1 MII converter ARM: dts: r9a06g032: Describe switch ARM: dts: r9a06g032: Describe GMAC2 ARM: dts: r9a06g032: Describe MII converter arm64: dts: renesas: r9a07g054l2-smarc: Correct SoC name in comment ARM: dts: renesas: Fix DA9063 watchdog subnode names arm64: dts: renesas: r8a779m8: Drop operating points above 1.5 GHz Link: https://lore.kernel.org/r/cover.1657278845.git.geert+renesas@glider.be Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Abel Vesa authored
In order to replace the fsl,scu txt file from bindings/arm/freescale, we need to split it between the right subsystems. This patch adds the fsl,scu.yaml in the firmware bindings folder. This one is only for the main SCU node. The old txt file will be removed only after all the child nodes have been properly switch to yaml. Signed-off-by:
Abel Vesa <abel.vesa@nxp.com> Signed-off-by:
Viorel Suman <viorel.suman@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Abel Vesa authored
In order to replace the fsl,scu txt file from bindings/arm/freescale, we need to split it between the right subsystems. This patch documents separately the 'watchdog' child node of the SCU main node. Signed-off-by:
Abel Vesa <abel.vesa@nxp.com> Signed-off-by:
Viorel Suman <viorel.suman@nxp.com> Reviewed-by:
Guenter Roeck <linux@roeck-us.net> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Abel Vesa authored
In order to replace the fsl,scu txt file from bindings/arm/freescale, we need to split it between the right subsystems. This patch documents separately the 'thermal' child node of the SCU main node. Signed-off-by:
Abel Vesa <abel.vesa@nxp.com> Signed-off-by:
Viorel Suman <viorel.suman@nxp.com> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Abel Vesa authored
In order to replace the fsl,scu txt file from bindings/arm/freescale, we need to split it between the right subsystems. This patch documents separately the 'rtc' child node of the SCU main node. Signed-off-by:
Abel Vesa <abel.vesa@nxp.com> Signed-off-by:
Viorel Suman <viorel.suman@nxp.com> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Abel Vesa authored
In order to replace the fsl,scu txt file from bindings/arm/freescale, we need to split it between the right subsystems. This patch documents separately the 'power controller' child node of the SCU main node. Signed-off-by:
Abel Vesa <abel.vesa@nxp.com> Signed-off-by:
Viorel Suman <viorel.suman@nxp.com> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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