- Dec 20, 2021
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Arnd Bergmann authored
Merge tag 'tegra-for-5.17-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers soc/tegra: Changes for v5.17-rc1 This set of changes contains some preparatory work that is shared by several branches and trees to support DVFS via power domains. There's also a bit of cleanup and improvements to reboot on chips that use PSCI. * tag 'tegra-for-5.17-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: soc/tegra: pmc: Rename core power domain soc/tegra: pmc: Rename 3d power domains soc/tegra: regulators: Prepare for suspend soc/tegra: fuse: Use resource-managed helpers soc/tegra: fuse: Reset hardware soc/tegra: pmc: Add reboot notifier soc/tegra: Don't print error message when OPPs not available Link: https://lore.kernel.org/r/20211217162253.1801077-1-thierry.reding@gmail.com Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'tegra-for-5.17-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers drivers: Changes for v5.17-rc1 This is an assortment of driver patches that rely on some of the changes in the for-5.17/soc branch. These have all been acked by the respective maintainers and go through the Tegra tree to more easily handle the build dependency. * tag 'tegra-for-5.17-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: media: staging: tegra-vde: Support generic power domain spi: tegra20-slink: Add OPP support mtd: rawnand: tegra: Add runtime PM and OPP support mmc: sdhci-tegra: Add runtime PM and OPP support pwm: tegra: Add runtime PM and OPP support bus: tegra-gmi: Add runtime PM and OPP support usb: chipidea: tegra: Add runtime PM and OPP support soc/tegra: Add devm_tegra_core_dev_init_opp_table_common() soc/tegra: Enable runtime PM during OPP state-syncing Link: https://lore.kernel.org/r/20211217162253.1801077-2-thierry.reding@gmail.com Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'ti-driver-soc-fixes-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/drivers SoC: Keystone driver update for v5.17 * k3-socinfo: Add entry for J721S2 SoC family * Misc fixups for tisci, pruss, knav_dma * tag 'ti-driver-soc-fixes-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: soc: ti: knav_dma: Fix NULL vs IS_ERR() checking in dma_init soc: ti: k3-socinfo: Add entry for J721S2 SoC family firmware: ti_sci: rm: remove unneeded semicolon soc: ti: pruss: fix referenced node in error message Link: https://lore.kernel.org/r/20211217154921.cagzppcensxx6wm4@pension Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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- Dec 17, 2021
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Arnd Bergmann authored
Merge tag 'renesas-drivers-for-v5.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers Renesas driver updates for v5.17 (take two) - Core support for the R-Car S4-8 (R8A779F0) SoC, including System Controller (SYSC) and Reset (RST) support. * tag 'renesas-drivers-for-v5.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: soc: renesas: rcar-rst: Add support for R-Car S4-8 soc: renesas: Identify R-Car S4-8 soc: renesas: r8a779f0-sysc: Add r8a779f0 support soc: renesas: rcar-gen4-sysc: Introduce R-Car Gen4 SYSC driver dt-bindings: clock: Add r8a779f0 CPG Core Clock Definitions dt-bindings: power: Add r8a779f0 SYSC power domain definitions Link: https://lore.kernel.org/r/cover.1639736722.git.geert+renesas@glider.be Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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- Dec 16, 2021
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Dmitry Osipenko authored
Currently driver supports legacy power domain API, this patch adds generic power domain support. This allows us to utilize a modern GENPD API for newer device-trees. Reviewed-by:
Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30 Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20 Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124 Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30 Acked-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Dmitry Osipenko <digetx@gmail.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Dmitry Osipenko authored
The SPI on Tegra belongs to the core power domain and we're going to enable GENPD support for the core domain. Now SPI driver must use OPP API for driving the controller's clock rate because OPP API takes care of reconfiguring the domain's performance state in accordance to the rate. Add OPP support to the driver. Acked-by:
Mark Brown <broonie@kernel.org> Reviewed-by:
Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by:
Dmitry Osipenko <digetx@gmail.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Dmitry Osipenko authored
The NAND on Tegra belongs to the core power domain and we're going to enable GENPD support for the core domain. Now NAND must be resumed using runtime PM API in order to initialize the NAND power state. Add runtime PM and OPP support to the NAND driver. Reviewed-by:
Ulf Hansson <ulf.hansson@linaro.org> Acked-by:
Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by:
Dmitry Osipenko <digetx@gmail.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Dmitry Osipenko authored
The SDHCI on Tegra belongs to the core power domain and we're going to enable GENPD support for the core domain. Now SDHCI must be resumed using runtime PM API in order to initialize the SDHCI power state. The SDHCI clock rate must be changed using OPP API that will reconfigure the power domain performance state in accordance to the rate. Add runtime PM and OPP support to the SDHCI driver. Reviewed-by:
Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by:
Dmitry Osipenko <digetx@gmail.com> Acked-by:
Adrian Hunter <adrian.hunter@intel.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Dmitry Osipenko authored
The PWM on Tegra belongs to the core power domain and we're going to enable GENPD support for the core domain. Now PWM must be resumed using runtime PM API in order to initialize the PWM power state. The PWM clock rate must be changed using OPP API that will reconfigure the power domain performance state in accordance to the rate. Add runtime PM and OPP support to the PWM driver. Reviewed-by:
Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by:
Dmitry Osipenko <digetx@gmail.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Dmitry Osipenko authored
The GMI bus on Tegra belongs to the core power domain and we're going to enable GENPD support for the core domain. Now GMI must be resumed using runtime PM API in order to initialize the GMI power state. Add runtime PM and OPP support to the GMI driver. Reviewed-by:
Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by:
Dmitry Osipenko <digetx@gmail.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Dmitry Osipenko authored
The Tegra USB controller belongs to the core power domain and we're going to enable GENPD support for the core domain. Now USB controller must be resumed using runtime PM API in order to initialize the USB power state. We already support runtime PM for the CI device, but CI's PM is separated from the RPM managed by tegra-usb driver. Add runtime PM and OPP support to the driver. Acked-by:
Peter Chen <peter.chen@kernel.org> Reviewed-by:
Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by:
Dmitry Osipenko <digetx@gmail.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
Merge branch 'tegra-for-5.17-soc-opp' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into for-5.17/drivers
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Dmitry Osipenko authored
CORE power domain uses name of device-tree node, which is inconsistent with the names of PMC domains. Set the name to "core" to make it consistent. Reviewed-by:
Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by:
Dmitry Osipenko <digetx@gmail.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Dmitry Osipenko authored
Only couple drivers need to get the -ENODEV error code and majority of drivers need to explicitly initialize the performance state. Add new common helper which sets up OPP table for these drivers. Reviewed-by:
Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by:
Dmitry Osipenko <digetx@gmail.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Dmitry Osipenko authored
Device-tree schema doesn't allow domain name to start with a number. We don't use 3d domain yet in device-trees, so rename it to the name used by Tegra TRMs: TD, TD2. Reported-by:
David Heidelberg <david@ixit.cz> Reviewed-by:
Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by:
Dmitry Osipenko <digetx@gmail.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Dmitry Osipenko authored
GENPD core now can set up domain's performance state properly while device is RPM-suspended. Runtime PM of a device must be enabled during setup because GENPD checks whether device is suspended and check doesn't work while RPM is disabled. Instead of replicating the boilerplate RPM-enable code around OPP helper for each driver, let's make OPP helper to take care of enabling it. Reviewed-by:
Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by:
Dmitry Osipenko <digetx@gmail.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Dmitry Osipenko authored
Depending on hardware version, Tegra SoC may require a higher voltages during resume from system suspend, otherwise hardware will crash. Set SoC voltages to a nominal levels during suspend. Link: https://lore.kernel.org/all/a8280b5b-7347-8995-c97b-10b798cdf057@gmail.com/ Reviewed-by:
Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by:
Dmitry Osipenko <digetx@gmail.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Dmitry Osipenko authored
Use resource-managed helpers to make code cleaner and more correct, properly releasing all resources in case of driver probe error. Signed-off-by:
Dmitry Osipenko <digetx@gmail.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Dmitry Osipenko authored
The FUSE controller is enabled at a boot time. Reset it in order to put hardware and clock into clean and disabled state. Reviewed-by:
Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by:
Dmitry Osipenko <digetx@gmail.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Jon Hunter authored
The Tegra PMC driver implements a restart handler that supports Tegra specific reboot commands such as placing the device into 'recovery' mode in order to reprogram the platform. This is accomplished by setting the appropriate bit in the PMC scratch0 register prior to rebooting the platform. For Tegra platforms that support PSCI or EFI, the default Tegra restart handler is not called and the PSCI or EFI restart handler is called instead. Hence, for Tegra platforms that support PSCI or EFI, the Tegra specific reboot commands do not currently work. Fix this by moving the code that programs the PMC scratch0 register into a separate reboot notifier that will always be called on reboot. Signed-off-by:
Jon Hunter <jonathanh@nvidia.com> Reviewed-by:
Dmitry Osipenko <digetx@gmail.com> Tested-by:
Dmitry Osipenko <digetx@gmail.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Dmitry Osipenko authored
Previously we assumed that devm_tegra_core_dev_init_opp_table() will be used only by drivers that will always have device with OPP table, but this is not true anymore. For example now Tegra30 will have OPP table for PWM, but Tegra20 not and both use the same driver. Hence let's not print the error message about missing OPP table in the common helper, we can print it elsewhere. Reviewed-by:
Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by:
Dmitry Osipenko <digetx@gmail.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Miaoqian Lin authored
Since devm_ioremap_resource() function return error pointers. The pktdma_get_regs() function does not return NULL, It return error pointers too. Using IS_ERR() to check the return value to fix this. Signed-off-by:
Miaoqian Lin <linmq006@gmail.com> Signed-off-by:
Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20211214015544.7270-1-linmq006@gmail.com
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- Dec 15, 2021
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https://github.com/AsahiLinux/linuxArnd Bergmann authored
Apple SoC PMGR driver updates for 5.17 * Adds an auto-PM feature that is necessary for a single device * Disables module builds, which were broken anyway * tag 'asahi-soc-pmgr-5.17-v2' of https://github.com/AsahiLinux/linux: soc: apple: apple-pmgr-pwrstate: Do not build as a module soc: apple: apple-pmgr-pwrstate: Add auto-PM min level support Link: https://lore.kernel.org/r/660f6f7f-0857-b54c-c415-79bcb93f0e02@marcan.st Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Hector Martin authored
This doesn't make any sense as a module since it is a critical device, and it turns out of_phandle_iterator_args was not exported so the module version doesn't build anyway. Fixes: 6df9d38f ("soc: apple: Add driver for Apple PMGR power state controls") Reported-by:
kernel test robot <lkp@intel.com> Reviewed-by:
Sven Peter <sven@svenpeter.dev> Signed-off-by:
Hector Martin <marcan@marcan.st>
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- Dec 14, 2021
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Arnd Bergmann authored
Merge tag 'memory-controller-drv-renesas-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.17 - Renesas Changes to the Renesas RPC-IF driver: 1. Add support for R9A07G044 / RZ/G2L. 2. Several minor fixes and improvements to the driver. * tag 'memory-controller-drv-renesas-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: renesas-rpc-if: refactor MOIIO and IOFV macros memory: renesas-rpc-if: avoid use of undocumented bits memory: renesas-rpc-if: simplify register update memory: renesas-rpc-if: Silence clang warning memory: renesas-rpc-if: Add support for RZ/G2L memory: renesas-rpc-if: Drop usage of RPCIF_DIRMAP_SIZE macro memory: renesas-rpc-if: Return error in case devm_ioremap_resource() fails dt-bindings: memory: renesas,rpc-if: Add optional interrupts property dt-bindings: memory: renesas,rpc-if: Add support for the R9A07G044 Link: https://lore.kernel.org/r/20211213105618.5686-1-krzysztof.kozlowski@canonical.com Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'optee-async-notif-for-v5.17' of https://git.linaro.org/people/jens.wiklander/linux-tee into arm/drivers OP-TEE Asynchronous notifications from secure world Adds support in the SMC based OP-TEE driver to receive asynchronous notifications from secure world using an edge-triggered interrupt as delivery mechanism. * tag 'optee-async-notif-for-v5.17' of https://git.linaro.org/people/jens.wiklander/linux-tee: optee: Fix NULL but dereferenced coccicheck error optee: add asynchronous notifications optee: separate notification functions tee: export teedev_open() and teedev_close_context() tee: fix put order in teedev_close_context() dt-bindings: arm: optee: add interrupt property docs: staging/tee.rst: add a section on OP-TEE notifications Link: https://lore.kernel.org/r/20211213102359.GA1638682@jade Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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https://github.com/Xilinx/linux-xlnxArnd Bergmann authored
arm64: dts: ZynqMP SoC changes for v5.17 - cleanup and fix PM_INIT_FINALIZE - check return value of zynqmp_pm_get_api_version() * tag 'zynqmp-soc-for-v5.17' of https://github.com/Xilinx/linux-xlnx: firmware: xilinx: check return value of zynqmp_pm_get_api_version() soc: xilinx: add a to_zynqmp_pm_domain macro soc: xilinx: use a properly named field instead of flags soc: xilinx: cleanup debug and error messages soc: xilinx: move PM_INIT_FINALIZE to zynqmp_pm_domains driver Link: https://lore.kernel.org/r/48dec441-2c1f-73a0-3e6c-aa0d7be5ba26@monstr.eu Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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https://github.com/AsahiLinux/linuxArnd Bergmann authored
Apple SoC PMGR driver for 5.17 Adds the new PMGR driver. This includes the driver only; DT and MAINTAINERS changes are part of the DT pull. Minor change from v3: added `depends on PM` to the Kconfig to fix COMPILE_TEST randconfig failures. * tag 'asahi-soc-pmgr-5.17' of https://github.com/AsahiLinux/linux: soc: apple: Add driver for Apple PMGR power state controls Link: https://lore.kernel.org/r/049f4de9-51be-7be4-1f9a-a59756af88d7@marcan.st Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'renesas-drivers-for-v5.17-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers Renesas driver updates for v5.17 - Add a remoteproc API for controlling the Cortex-R7 boot address on R-Car Gen3 SoCs, - Consolidate product register handling. * tag 'renesas-drivers-for-v5.17-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: soc: renesas: Consolidate product register handling soc: renesas: rcar-rst: Add support to set rproc boot address Link: https://lore.kernel.org/r/cover.1638530612.git.geert+renesas@glider.be Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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- Dec 13, 2021
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Aswath Govindraju authored
J721S2 SoC's JTAG PARTNO is 0xBB75. Signed-off-by:
Aswath Govindraju <a-govindraju@ti.com> Signed-off-by:
Nishanth Menon <nm@ti.com> Reviewed-by:
Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/20211203120913.14737-1-a-govindraju@ti.com
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- Dec 12, 2021
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Hector Martin authored
This is seemingly required for DCP/DCPEXT, without which they refuse to boot properly. They need to be set to minimum state 4 (clock gated). Reviewed-by:
Sven Peter <sven@svenpeter.dev> Signed-off-by:
Hector Martin <marcan@marcan.st>
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- Dec 08, 2021
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Rajan Vaja authored
Currently return value of zynqmp_pm_get_api_version() is ignored. Because of that, API version is checked in case of error also. So add check for return value of zynqmp_pm_get_api_version(). Signed-off-by:
Rajan Vaja <rajan.vaja@xilinx.com> Reviewed-by:
Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/1633509835-31949-1-git-send-email-rajan.vaja@xilinx.com Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michael Tretter authored
Replace container_of for converting a generic_pm_domain to a zynqmp_pm_domain with a macro definition to simplify the code. Signed-off-by:
Michael Tretter <m.tretter@pengutronix.de> Acked-by:
Michal Simek <michal.simek@xilinx.com> Acked-by:
Rajan Vaja <rajan.vaja@xilinx.com> Link: https://lore.kernel.org/r/20210825150313.4033156-5-m.tretter@pengutronix.de Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michael Tretter authored
Instead of defining a flags field and a single bit in this field to signal that a PM node has been requested, use a boolean field with a descriptive name. No functional change, but using a proper name instead of flags makes the code easier to read. Signed-off-by:
Michael Tretter <m.tretter@pengutronix.de> Acked-by:
Michal Simek <michal.simek@xilinx.com> Acked-by:
Rajan Vaja <rajan.vaja@xilinx.com> Link: https://lore.kernel.org/r/20210825150313.4033156-4-m.tretter@pengutronix.de Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michael Tretter authored
Use dev_err/dev_dbg instead of pr_err/pr_debug. Add the PM node ids to supplement the (arbitrary) power domain names to include information which PM nodes are requested by the driver. Drop function names from the messages, because they can easily be added with dynamic debug. Remove comments explaining that error messages are printed on errors. Signed-off-by:
Michael Tretter <m.tretter@pengutronix.de> Acked-by:
Michal Simek <michal.simek@xilinx.com> Acked-by:
Rajan Vaja <rajan.vaja@xilinx.com> Link: https://lore.kernel.org/r/20210825150313.4033156-3-m.tretter@pengutronix.de Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michael Tretter authored
PM_INIT_FINALIZE tells the PMU FW that Linux is able to handle the power management nodes that are provided by the PMU FW. Nodes that are not requested are shut down after this call. Calling PM_INIT_FINALIZE from the zynqmp_power driver is wrong. The PM node request mechanism is implemented in the zynqmp_pm_domains driver, which must also call PM_INIT_FINALIZE. Due to the behavior of the PMU FW, all devices must be powered up before PM_INIT_FINALIZE is called, because otherwise the devices might misbehave. Calling PM_INIT_FINALIZE from the sync_state device callback ensures that all users probed successfully before the PMU FW is allowed to power off unused domains. Signed-off-by:
Michael Tretter <m.tretter@pengutronix.de> Acked-by:
Michal Simek <michal.simek@xilinx.com> Acked-by:
Rajan Vaja <rajan.vaja@xilinx.com> Link: https://lore.kernel.org/r/20210825150313.4033156-2-m.tretter@pengutronix.de Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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- Dec 07, 2021
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Yoshihiro Shimoda authored
Add support for R-Car S4-8 (R8A779F0) to the R-Car RST driver. The register map of R-Car S4-8 is the same as R-Car V3U so that renames "V3U" and "r8a779a0" to "Gen4". Signed-off-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20211201073308.1003945-11-yoshihiro.shimoda.uh@renesas.com Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be>
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Yoshihiro Shimoda authored
Add support for identifying the R-Car S4-8 (R8A779F0) SoC. Signed-off-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20211201073308.1003945-8-yoshihiro.shimoda.uh@renesas.com Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be>
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Yoshihiro Shimoda authored
Add support for R-Car S4-8 (R8A779F0) SoC power areas and register access. Signed-off-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20211201073308.1003945-7-yoshihiro.shimoda.uh@renesas.com Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be>
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Geert Uytterhoeven authored
Renesas R-Car S4-8 DT Binding Definitions Clock and Power Domain definitions for the Renesas R-Car S4-8 (R8A77FA0) SoC, shared by driver and DT source files.
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