- Mar 24, 2020
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Tudor Ambarus authored
When there are more BP settings than needed for defining the protected areas of the flash memory, most flashes will define the remaining settings as "protect all", i.e. the equivalent of having all the BP bits set to one. But there are flashes where the in-between BP values are undefined (not mentioned), and only the "all bits set" is protecting the entire memory. One such example is w25q80, where BP[2:0]=0b101 and 0b110 are not defined. Set all the BP bits to one when lock_len == mtd->size, to treat this special case. Suggested-by:
Michael Walle <michael@walle.cc> Signed-off-by:
Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by:
Jungseung Lee <js07.lee@samsung.com> Reviewed-by:
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Gustavo A. R. Silva authored
The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732 ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by:Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by:
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Tudor Ambarus authored
When an Erase or Program error occurs on a spansion/cypress or a micron flash, the WEL bit remains set to one and should be cleared with a WRDI command in order to protect against inadvertent writes that can possible corrupt the contents of the memory. Winbond, macronix, gd, etc., do not support the E_ERR and P_ERR bits in the Status Register and always clear the WEL bit regardless of the outcome of the erase or page program operation (ex w25q40bw, MX25L25635E). Issue a WRDI command when erase or page program errors occur. Reported-by:
John Garry <john.garry@huawei.com> Signed-off-by:
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Lukas Bulwahn authored
Commit a0900d01 ("mtd: spi-nor: Prepare core / manufacturer code split") moved all SPI NOR controller drivers to a controllers/ sub-directory. However, the moved nxp-spifi.c file was referenced in the ARM/LPC18XX ARCHITECTURE entry in MAINTAINERS. Hence, since then, ./scripts/get_maintainer.pl --self-test complains: warning: no file matches F: drivers/mtd/spi-nor/nxp-spifi.c Update the file entry in MAINTAINERS to its new location. Signed-off-by:
Lukas Bulwahn <lukas.bulwahn@gmail.com> Signed-off-by:
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- Mar 17, 2020
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Tudor Ambarus authored
The SPI NOR controllers drivers must not be able to use structures that are meant just for the SPI NOR core. struct spi_nor_flash_parameter is filled at run-time with info gathered from flash_info, manufacturer and sfdp data. struct spi_nor_flash_parameter should be opaque to the SPI NOR controller drivers, make sure it is. spi_nor_option_flags, spi_nor_read_command, spi_nor_pp_command, spi_nor_read_command_index and spi_nor_pp_command_index are defined for the core use, make sure they are opaque to the SPI NOR controller drivers. Signed-off-by:
Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by:
Vignesh Raghavendra <vigneshr@ti.com>
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Tudor Ambarus authored
Cross manufacturer code is unlikely and discouraged, get rid of the MFR definitions. Suggested-by:
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Boris Brezillon authored
All entries have been moved to manufacturer drivers. Get rid of this empty table. Signed-off-by:
Boris Brezillon <bbrezillon@kernel.org> Signed-off-by:
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Boris Brezillon authored
Create a SPI NOR manufacturer driver for XMC chips, and move the XMC definitions outside of core.c. Signed-off-by:
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Boris Brezillon authored
Create a SPI NOR manufacturer driver for Xilinx chips, and move the Xilinx definitions outside of core.c. While at it, remove the SPI_S3AN flag which is now useless. Signed-off-by:
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Boris Brezillon authored
Create a SPI NOR manufacturer driver for Catalyst chips, and move the Catalyst definitions outside of core.c. Signed-off-by:
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Boris Brezillon authored
Create a SPI NOR manufacturer driver for Winbond chips, and move the Winbond definitions outside of core.c. Signed-off-by:
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Boris Brezillon authored
Create a SPI NOR manufacturer driver for SST chips, and move the SST definitions outside of core.c. Signed-off-by:
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Boris Brezillon authored
Create a SPI NOR manufacturer driver for Spansion chips, and move the Spansion definitions outside of core.c. Signed-off-by:
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Boris Brezillon authored
Create a SPI NOR manufacturer driver for Micron/ST chips, and move the Micron/ST definitions outside of core.c. Signed-off-by:
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Boris Brezillon authored
Create a SPI NOR manufacturer driver for Macronix chips, and move the Macronix definitions outside of core.c. Signed-off-by:
Xiang Chen <chenxiang66@hisilicon.com>
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Boris Brezillon authored
Create a SPI NOR manufacturer driver for ISSI chips, and move the ISSI definitions outside of core.c. Signed-off-by:
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Boris Brezillon authored
Create a SPI NOR manufacturer driver for Intel chips, and move the Intel definitions outside of core.c. Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com>
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Boris Brezillon authored
Create a SPI NOR manufacturer driver for GigaDevice chips, and move the GigaDevice definitions outside of core.c. Signed-off-by:
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Boris Brezillon authored
Create a SPI NOR manufacturer driver for Fujitsu chips, and move the Fujitsu definitions outside of core.c. Signed-off-by:
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Boris Brezillon authored
Create a SPI NOR manufacturer driver for Everspin chips, and move the Everspin definitions outside of core.c. Signed-off-by:
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Boris Brezillon authored
Create a SPI NOR manufacturer driver for ESMT chips, and move the ESMT definitions outside of core.c. Signed-off-by:
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Boris Brezillon authored
Create a SPI NOR manufacturer driver for Eon chips, and move the Eon definitions outside of core.c. Signed-off-by:
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Boris Brezillon authored
Create a SPI NOR manufacturer driver for Atmel chips, and move the Atmel definitions outside of core.c. Signed-off-by:
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Boris Brezillon authored
Declare a spi_nor_manufacturer struct and add basic building blocks to move manufacturer specific code outside of the core. Signed-off-by:
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Boris Brezillon authored
Expose the flash_info struct and some function prototypes that will be used by manufacturers. Signed-off-by:
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Tudor Ambarus authored
It makes the core file a bit smaller and provides better separation between the SFDP parsing and core logic. Keep the core.h and sfdp.h definitions private in drivers/mtd/spi-nor/. Both expose just the definitions that are required by the core and manufacturer drivers. None of the SPI NOR controller drivers should include them. Signed-off-by:
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Boris Brezillon authored
Move all SPI NOR controller drivers to a controllers/ sub-directory so that we only have SPI NOR related source files under drivers/mtd/spi-nor/. Rename spi-nor.c into core.c, we are about to split this file in multiple source files (one per manufacturer, plus one for the SFDP parsing logic). Signed-off-by:
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Tudor Ambarus authored
Rename (*set_4byte)() to (*set_4byte_addr_mode)() for a better differentiation between the 4 byte address mode and opcodes. Rename macronix_set_4byte() to spi_nor_set_4byte_addr_mode(), it will be the only 4 byte address mode method exposed to the manufacturer drivers. Here's how the manufacturers enter and exit the 4 byte address mode: - eon, gidadevice, issi, macronix, xmc use EN4B/EX4B - micron-st needs WEN. st_micron_set_4byte_addr_mode() will become a private method, as they are the only ones that need WEN before the EN4B/EX4B commands. - newer spansion have a 4BAM opcode (this translates to a new, public command). Older spansion flashes use the BRWR command (legacy in core.c -> spansion_set_4byte_addr_mode()) - winbond's method is hackish and may be reason for just a flash fixup hook -> private method Signed-off-by:
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Boris Brezillon authored
Replace the manufacturer prefix by something describing more precisely what those functions do. Signed-off-by:
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- Mar 13, 2020
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Tudor Ambarus authored
spi: Rewrite mtk-quadspi spi-nor driver with spi-mem This patchset from Chuanhong Guo <gch981213@gmail.com> adds a spi-mem driver for Mediatek SPI-NOR controller, which already has limited support by mtk-quadspi. This new driver can make use of full quadspi capability of this controller. The mtk-quadspi driver is replaced by the new spi-mtk-nor driver. Merge it in spi-nor/next to avoid conflicts during the release cycle.
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- Mar 12, 2020
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Chuanhong Guo authored
This driver is superseded by the new spi-mtk-nor driver. Signed-off-by:
Chuanhong Guo <gch981213@gmail.com> Acked-by:
Mark Brown <broonie@kernel.org>
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Chuanhong Guo authored
spi-mtk-nor is a driver to replace mtk-quadspi and they have almost the same device-tree bindings. Reuse this binding documentation and convert it for new driver: 1. "Mediatek SoCs" -> "Mediatek ARM SoCs" because MTK MIPS SoCs use different controllers. 2. document "interrupts" as a required property because it's available on all SoCs with this controller and new driver takes advantages of it. It's implemented as optional only to maintain backward compatibility. 3. add a dummy interrupt binding in example. Signed-off-by:
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Chuanhong Guo authored
This is a driver for mtk spi-nor controller using spi-mem interface. The same controller already has limited support provided by mtk-quadspi driver under spi-nor framework and this new driver is a replacement for the old one. Comparing to the old driver, this driver has following advantages: 1. It can handle any full-duplex spi transfer up to 6 bytes, and this is implemented using generic spi interface. 2. It take account into command opcode properly. The reading routine in this controller can only use 0x03 or 0x0b as opcode on 1-1-1 transfers, but old driver doesn't implement this properly. This driver checks supported opcode explicitly and use (1) to perform unmatched operations. 3. It properly handles SFDP reading. Old driver can't read SFDP due to the bug mentioned in (2). 4. It can do 1-2-2 and 1-4-4 fast reading on spi-nor. These two ops requires parsing SFDP, which isn't possible in old driver. And the old driver is only flagged to support 1-1-2 mode. 5. It takes advantage of the DMA feature in this controller for long reads and supports IRQ on DMA requests to free cpu cycles from polling status registers on long DMA reading. It achieves up to 17.5MB/s reading speed (1-4-4 mode) which is way faster than the old one. IRQ is implemented as optional to maintain backward compatibility. Signed-off-by:
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Chuanhong Guo authored
We only need a spi-max-frequency when we specifically request a spi frequency lower than the max speed of spi host. This property is already documented as optional property and current host drivers are implemented to operate at highest speed possible when spi->max_speed_hz is 0. This patch makes spi-max-frequency an optional property so that we could just omit it to use max controller speed. Signed-off-by:
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- Feb 27, 2020
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Jonathan Neuschäfer authored
- Don't use `tmp` for two purposes (return value, loop counter). Instead, use `i` for the loop counter, and `ret` for the return value. - Don't use tabs between type and name in variable declarations, for consistency with other functions in spi-nor.c. - Rewrite nested `if`s as `if (a && b)`. - Remove `info` variable, and use spi_nor_ids[i] directly. Signed-off-by:
Jonathan Neuschäfer <j.neuschaefer@gmx.net> [tudor.ambarus@microchip.com: change i's type from int to unsigned int, reorder local variables] Signed-off-by:
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- Feb 19, 2020
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Sergei Shtylyov authored
Make use of the spi-mem direct mapping API to let advanced controllers optimize read/write operations when they support direct mapping. Based on the original patch by Boris Brezillon <boris.brezillon@bootlin.com>. Signed-off-by:
Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by:
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Sergei Shtylyov authored
spi_nor_spimem_xfer_data() being a helper function for the data reads/ writes contains 3 fragments that depend on the data direction; and I'm going to add another one to call the SPI dirmap API... I think this function should be split so that the common fragments are put into 2 functions, spi_nor_spimem_bounce() and spi_nor_spimem_exec_op() called from spi_nor_spimem_{read|write}_data(), and the data direction dependent bits moved back into those read/write functions -- that way we would be able to avoid *goto*s otherwise needed in the next patch adding the SPI dirmap support... Signed-off-by:
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- Feb 17, 2020
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Jungseung Lee authored
The shift variable of SR_BP is conclusive because the first bit of SR_BP is fixed on all known flashes. Replace ffs operation with SR_BP_SHIFT. Signed-off-by:
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Sergei Shtylyov authored
The driver calls le32_to_cpu() to convert the little-endian tables to a CPU endianness, where le32_to_cpus() should have been called. Was going to use that one... and then discovered a whole array converter, le32_to_cpu_array()! :-) Signed-off-by:
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Linus Torvalds authored
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