Commit 935e35d8 authored by Martin Leung's avatar Martin Leung Committed by Alex Deucher
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drm/amd/display: Stop waiting for vblank during pipe programming 



[why and how]
This line was originally removed for a compliance issue, but then
reverted as it caused a fringe underflow case.

However, the addition of this line caused a underflow regression
when subVP is on, and it needs to be removed again. We plan to
fix subvp underflow and then re-add in this line. After that,
we will investigate what to do next for the compliance issue.

Reviewed-by: default avatarAlvin Lee <Alvin.Lee2@amd.com>
Acked-by: default avatarAlex Hung <alex.hung@amd.com>
Signed-off-by: default avatarMartin Leung <Martin.Leung@amd.com>
Tested-by: default avatarMark Broadworth <mark.broadworth@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 361edc61

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c

+0 −1
Original line number Diff line number Diff line
@@ -1663,7 +1663,6 @@ static void dcn20_program_pipe( 
				pipe_ctx->pipe_dlg_param.vupdate_width);



		if (pipe_ctx->stream->mall_stream_config.type != SUBVP_PHANTOM) {

			pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VBLANK);

			pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VACTIVE);

		}