Commit 361edc61 authored by Iswara Nagulendran's avatar Iswara Nagulendran Committed by Alex Deucher
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drm/amd/display: Modify checks to enable TPS3 pattern when required 



[HOW&WHY]
Checking if both DSC and FEC supported from sink and
source before going with TPS3 pattern during link
training.

Reviewed-by: default avatarAnthony Koo <Anthony.Koo@amd.com>
Acked-by: default avatarAlex Hung <alex.hung@amd.com>
Signed-off-by: default avatarIswara Nagulendran <iswara.nagulendran@amd.com>
Tested-by: default avatarMark Broadworth <mark.broadworth@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 14e1f089

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c

+5 −1
Original line number Diff line number Diff line
@@ -399,7 +399,11 @@ static bool dmub_psr_copy_settings(struct dmub_psr *dmub, 
		link->psr_settings.force_ffu_mode = 0;

	copy_settings_data->force_ffu_mode = link->psr_settings.force_ffu_mode;



	if (link->fec_state == dc_link_fec_enabled &&

	if (((link->dpcd_caps.fec_cap.bits.FEC_CAPABLE &&

		!link->dc->debug.disable_fec) &&

		(link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT &&

		!link->panel_config.dsc.disable_dsc_edp &&

		link->dc->caps.edp_dsc_support)) &&

		link->dpcd_caps.sink_dev_id == DP_DEVICE_ID_38EC11 &&

		(!memcmp(link->dpcd_caps.sink_dev_id_str, DP_SINK_DEVICE_STR_ID_1,

			sizeof(DP_SINK_DEVICE_STR_ID_1)) ||