Commit 6c651b13 authored by Thierry Reding's avatar Thierry Reding
Browse files

drm/tegra: dp: Read channel coding capability from sink 



Parse from the sink capabilities whether or not it supports ANSI 8B/10B
channel coding as specified in ANSI X3.230-1994, clause 11.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent db199502

drivers/gpu/drm/tegra/dp.c

+3 −0
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ static void drm_dp_link_caps_reset(struct drm_dp_link_caps *caps) 
	caps->enhanced_framing = false;

	caps->tps3_supported = false;

	caps->fast_training = false;

	caps->channel_coding = false;

}



void drm_dp_link_caps_copy(struct drm_dp_link_caps *dest,
@@ -21,6 +22,7 @@ void drm_dp_link_caps_copy(struct drm_dp_link_caps *dest, 
	dest->enhanced_framing = src->enhanced_framing;

	dest->tps3_supported = src->tps3_supported;

	dest->fast_training = src->fast_training;

	dest->channel_coding = src->channel_coding;

}



static void drm_dp_link_reset(struct drm_dp_link *link)
@@ -67,6 +69,7 @@ int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link) 
	link->caps.enhanced_framing = drm_dp_enhanced_frame_cap(dpcd);

	link->caps.tps3_supported = drm_dp_tps3_supported(dpcd);

	link->caps.fast_training = drm_dp_fast_training_cap(dpcd);

	link->caps.channel_coding = drm_dp_channel_coding_supported(dpcd);



	link->rate = link->max_rate;

	link->lanes = link->max_lanes;

drivers/gpu/drm/tegra/dp.h

+7 −0
Original line number Diff line number Diff line
@@ -35,6 +35,13 @@ struct drm_dp_link_caps { 
	 * AUX CH handshake not required for link training

	 */

	bool fast_training;



	/**

	 * @channel_coding:

	 *

	 * ANSI 8B/10B channel coding capability

	 */

	bool channel_coding;

};



void drm_dp_link_caps_copy(struct drm_dp_link_caps *dest,