Commit db199502 authored by Thierry Reding's avatar Thierry Reding
Browse files

drm/tegra: dp: Read TPS3 capability from sink 



The TPS3 capability can be exposed by DP 1.2 and later sinks if they
support the alternative training pattern for channel equalization.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent cb072eeb

drivers/gpu/drm/tegra/dp.c

+3 −0
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ 
static void drm_dp_link_caps_reset(struct drm_dp_link_caps *caps)

{

	caps->enhanced_framing = false;

	caps->tps3_supported = false;

	caps->fast_training = false;

}
@@ -18,6 +19,7 @@ void drm_dp_link_caps_copy(struct drm_dp_link_caps *dest, 
			   const struct drm_dp_link_caps *src)

{

	dest->enhanced_framing = src->enhanced_framing;

	dest->tps3_supported = src->tps3_supported;

	dest->fast_training = src->fast_training;

}
@@ -63,6 +65,7 @@ int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link) 
	link->max_lanes = drm_dp_max_lane_count(dpcd);



	link->caps.enhanced_framing = drm_dp_enhanced_frame_cap(dpcd);

	link->caps.tps3_supported = drm_dp_tps3_supported(dpcd);

	link->caps.fast_training = drm_dp_fast_training_cap(dpcd);



	link->rate = link->max_rate;

drivers/gpu/drm/tegra/dp.h

+7 −0
Original line number Diff line number Diff line
@@ -22,6 +22,13 @@ struct drm_dp_link_caps { 
	 */

	bool enhanced_framing;



	/**

	 * tps3_supported:

	 *

	 * training pattern sequence 3 supported for equalization

	 */

	bool tps3_supported;



	/**

	 * @fast_training:

	 *