Commit 38c41903 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'sparx5-dt-5.10' of https://github.com/microchip-ung/linux-upstream into arm/dt 

Sparx5 DT updates for Linux 5.10

- Add public repo to MAINTAINERS
- Add SPI controller and devices
- Add eMMC controller and devices
- Add temperature sensor

* tag 'sparx5-dt-5.10' of https://github.com/microchip-ung/linux-upstream:
  arm64: dts: sparx5: Add spi-nand devices
  arm64: dts: sparx5: Add spi-nor support
  arm64: dts: sparx5: Add SPI controller and associated mmio-mux
  MAINTAINERS: Add git tree for Sparx5
  arm64: dts: sparx5: Add hwmon temperature sensor
  arm64: dts: sparx5: Add Sparx5 eMMC support

Link: https://lore.kernel.org/r/878sda2dj0.fsf@microchip.com


Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents a7140476 5df50128

MAINTAINERS

+1 −0
Original line number Diff line number Diff line
@@ -2136,6 +2136,7 @@ M: Steen Hegelund <Steen.Hegelund@microchip.com> 
M:	Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>

L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)

S:	Supported

T:	git git://github.com/microchip-ung/linux-upstream.git

F:	arch/arm64/boot/dts/microchip/

N:	sparx5
































arch/arm64/boot/dts/microchip/sparx5.dtsi



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@@ -5,6 +5,7 @@

















#include <dt-bindings/gpio/gpio.h>









#include <dt-bindings/interrupt-controller/arm-gic.h>









#include <dt-bindings/clock/microchip,sparx5.h>



















/ {









	compatible = "microchip,sparx5";








@@ -13,6 +14,7 @@ / {







	#size-cells = <1>;



















	aliases {









		spi0 = &spi0;









		serial0 = &uart0;









		serial1 = &uart1;









	};








@@ -117,6 +119,22 @@ gic: interrupt-controller@600300000 {







			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;









		};



















		cpu_ctrl: syscon@600000000 {









			compatible = "microchip,sparx5-cpu-syscon", "syscon",









				     "simple-mfd";









			reg = <0x6 0x00000000 0xd0>;









			mux: mux-controller {









				compatible = "mmio-mux";









				#mux-control-cells = <0>;









				/*









				 * SI_OWNER and SI2_OWNER in GENERAL_CTRL









				 * SPI:  value 9 - (SIMC,SIBM) = 0b1001









				 * SPI2: value 6 - (SIBM,SIMC) = 0b0110









				 */









				mux-reg-masks = <0x88 0xf0>;









			};









		};



















		uart0: serial@600100000 {









			pinctrl-0 = <&uart_pins>;









			pinctrl-names = "default";








@@ -143,6 +161,19 @@ uart1: serial@600102000 {







			status = "disabled";









		};



















		spi0: spi@600104000 {









			#address-cells = <1>;









			#size-cells = <0>;









			compatible = "microchip,sparx5-spi";









			reg = <0x6 0x00104000 0x40>;









			num-cs = <16>;









			reg-io-width = <4>;









			reg-shift = <2>;









			clocks = <&ahb_clk>;









			interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;









			status = "disabled";









		};



















		timer1: timer@600105000 {









			compatible = "snps,dw-apb-timer";









			reg = <0x6 0x00105000 0x1000>;








@@ -151,6 +182,20 @@ timer1: timer@600105000 {







			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;









		};



















		sdhci0: mmc@600800000 {









			compatible = "microchip,dw-sparx5-sdhci";









			status = "disabled";









			reg = <0x6 0x00800000 0x1000>;









			pinctrl-0 = <&emmc_pins>;









			pinctrl-names = "default";









			clocks = <&clks CLK_ID_AUX1>;









			clock-names = "core";









			assigned-clocks = <&clks CLK_ID_AUX1>;









			assigned-clock-rates = <800000000>;









			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;









			bus-width = <8>;









		};



















		gpio: pinctrl@6110101e0 {









			compatible = "microchip,sparx5-pinctrl";









			reg = <0x6 0x110101e0 0x90>, <0x6 0x10508010 0x100>;








@@ -161,6 +206,26 @@ gpio: pinctrl@6110101e0 {







			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;









			#interrupt-cells = <2>;



















			cs1_pins: cs1-pins {









				pins = "GPIO_16";









				function = "si";









			};



















			cs2_pins: cs2-pins {









				pins = "GPIO_17";









				function = "si";









			};



















			cs3_pins: cs3-pins {









				pins = "GPIO_18";









				function = "si";









			};



















			si2_pins: si2-pins {









				pins = "GPIO_39", "GPIO_40", "GPIO_41";









				function = "si2";









			};



















			uart_pins: uart-pins {









				pins = "GPIO_10", "GPIO_11";









				function = "uart";








@@ -180,6 +245,15 @@ i2c2_pins: i2c2-pins {







				pins = "GPIO_28", "GPIO_29";









				function = "twi2";









			};



















			emmc_pins: emmc-pins {









				pins = "GPIO_34", "GPIO_35", "GPIO_36",









					"GPIO_37", "GPIO_38", "GPIO_39",









					"GPIO_40", "GPIO_41", "GPIO_42",









					"GPIO_43", "GPIO_44", "GPIO_45",









					"GPIO_46", "GPIO_47";









				function = "emmc";









			};









		};



















		i2c0: i2c@600101000 {








@@ -209,5 +283,12 @@ i2c1: i2c@600103000 {







			clock-frequency = <100000>;









			clocks = <&ahb_clk>;









		};



















		tmon0: tmon@610508110 {









			compatible = "microchip,sparx5-temp";









			reg = <0x6 0x10508110 0xc>;









			#thermal-sensor-cells = <0>;









			clocks = <&ahb_clk>;









		};









	};









};
























arch/arm64/boot/dts/microchip/sparx5_nand.dtsi
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)









/*









 * Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries.









 */



















&gpio {









	cs14_pins: cs14-pins {









		pins = "GPIO_44";









		function = "si";









	};









};



















&spi0 {









	pinctrl-0 = <&si2_pins>;









	pinctrl-names = "default";









	spi@e {









		compatible = "spi-mux";









		mux-controls = <&mux>;









		#address-cells = <1>;









		#size-cells = <0>;









		reg = <14>; /* CS14 */









		spi-flash@6 {









			compatible = "spi-nand";









			pinctrl-0 = <&cs14_pins>;









			pinctrl-names = "default";









			reg = <0x6>; /* SPI2 */









			spi-max-frequency = <42000000>;









			rx-sample-delay-ns = <7>;  /* Tune for speed */









		};









	};









};
























arch/arm64/boot/dts/microchip/sparx5_pcb125.dts



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@@ -16,6 +16,59 @@ memory@0 {







	};









};



















&gpio {









	emmc_pins: emmc-pins {









		/* NB: No "GPIO_35", "GPIO_36", "GPIO_37"









		 * (N/A: CARD_nDETECT, CARD_WP, CARD_LED)









		 */









		pins = "GPIO_34", "GPIO_38", "GPIO_39",









			"GPIO_40", "GPIO_41", "GPIO_42",









			"GPIO_43", "GPIO_44", "GPIO_45",









			"GPIO_46", "GPIO_47";









		drive-strength = <3>;









		function = "emmc";









	};









};



















&sdhci0 {









	status = "okay";









	bus-width = <8>;









	non-removable;









	pinctrl-0 = <&emmc_pins>;









	max-frequency = <8000000>;









	microchip,clock-delay = <10>;









};



















&spi0 {









	status = "okay";









	spi@0 {









		compatible = "spi-mux";









		mux-controls = <&mux>;









		#address-cells = <1>;









		#size-cells = <0>;









		reg = <0>;	/* CS0 */









		spi-flash@9 {









			compatible = "jedec,spi-nor";









			spi-max-frequency = <8000000>;









			reg = <0x9>;	/* SPI */









		};









	};









	spi@1 {









		compatible = "spi-mux";









		mux-controls = <&mux 0>;









		#address-cells = <1>;









		#size-cells = <0>;









		reg = <1>; /* CS1 */









		spi-flash@9 {









			compatible = "spi-nand";









			pinctrl-0 = <&cs1_pins>;









			pinctrl-names = "default";









			spi-max-frequency = <8000000>;









			reg = <0x9>;	/* SPI */









		};









	};









};



















&i2c1 {









	status = "okay";









};
























arch/arm64/boot/dts/microchip/sparx5_pcb134.dts



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/dts-v1/;









#include "sparx5_pcb134_board.dtsi"









#include "sparx5_nand.dtsi"



















/ {









	model = "Sparx5 PCB134 Reference Board (NAND)";