Commit 20f94967 authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter
Browse files

drm/i915: Disable trickle feed via MI_ARB_STATE for the gen4 



According to BSpec, trickle feed should be disabled for BW and
mobile CL. Those constraints seem to match all of our gen4 chipsets.

Trickle feed is disabled via the MI_ARB_STATE register instead of
per plane controls on gen4.

Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent de1aa629

drivers/gpu/drm/i915/intel_pm.c

+4 −0
Original line number Diff line number Diff line
@@ -4944,6 +4944,8 @@ static void crestline_init_clock_gating(struct drm_device *dev) 
	I915_WRITE(DSPCLK_GATE_D, 0);

	I915_WRITE(RAMCLK_GATE_D, 0);

	I915_WRITE16(DEUC, 0);

	I915_WRITE(MI_ARB_STATE,

		   _MASKED_BIT_ENABLE(MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE));

}



static void broadwater_init_clock_gating(struct drm_device *dev)
@@ -4956,6 +4958,8 @@ static void broadwater_init_clock_gating(struct drm_device *dev) 
		   I965_ISC_CLOCK_GATE_DISABLE |

		   I965_FBC_CLOCK_GATE_DISABLE);

	I915_WRITE(RENCLK_GATE_D2, 0);

	I915_WRITE(MI_ARB_STATE,

		   _MASKED_BIT_ENABLE(MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE));

}



static void gen3_init_clock_gating(struct drm_device *dev)