Commit 1c0b3cbe authored by Linus Walleij's avatar Linus Walleij
Browse files

Merge tag 'renesas-pinctrl-for-v6.7-tag1' of... 

Merge tag 'renesas-pinctrl-for-v6.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v6.7

  - Miscellaneous fixes and improvements.
parents e8b4ff6a c3852566

drivers/pinctrl/renesas/pfc-r8a7779.c

+1 −1
Original line number Diff line number Diff line
@@ -1942,7 +1942,7 @@ static const unsigned int intc_irq3_b_pins[] = { 
static const unsigned int intc_irq3_b_mux[] = {

	IRQ3_B_MARK,

};

/* - LSBC ------------------------------------------------------------------- */

/* - LBSC ------------------------------------------------------------------- */

static const unsigned int lbsc_cs0_pins[] = {

	/* CS */

	RCAR_GP_PIN(0, 13),

drivers/pinctrl/renesas/pinctrl-rzg2l.c

+9 −8
Original line number Diff line number Diff line
@@ -133,7 +133,7 @@ struct rzg2l_pinctrl_data { 
	const char * const *port_pins;

	const u32 *port_pin_configs;

	unsigned int n_ports;

	struct rzg2l_dedicated_configs *dedicated_pins;

	const struct rzg2l_dedicated_configs *dedicated_pins;

	unsigned int n_port_pins;

	unsigned int n_dedicated_pins;

};
@@ -985,7 +985,7 @@ static const char * const rzg2l_gpio_names[] = { 
	"P48_0", "P48_1", "P48_2", "P48_3", "P48_4", "P48_5", "P48_6", "P48_7",

};



static const u32 rzg2l_gpio_configs[] = {

static const u32 r9a07g044_gpio_configs[] = {

	RZG2L_GPIO_PORT_PACK(2, 0x10, RZG2L_MPXED_PIN_FUNCS),

	RZG2L_GPIO_PORT_PACK(2, 0x11, RZG2L_MPXED_PIN_FUNCS),

	RZG2L_GPIO_PORT_PACK(2, 0x12, RZG2L_MPXED_PIN_FUNCS),
@@ -1059,7 +1059,7 @@ static const u32 r9a07g043_gpio_configs[] = { 
	RZG2L_GPIO_PORT_PACK(6, 0x22, RZG2L_MPXED_PIN_FUNCS),

};



static struct {

static const struct {

	struct rzg2l_dedicated_configs common[35];

	struct rzg2l_dedicated_configs rzg2l_pins[7];

} rzg2l_dedicated_pins = {
@@ -1175,6 +1175,8 @@ static void rzg2l_gpio_irq_disable(struct irq_data *d) 
	u32 port;

	u8 bit;



	irq_chip_disable_parent(d);



	port = RZG2L_PIN_ID_TO_PORT(hwirq);

	bit = RZG2L_PIN_ID_TO_PIN(hwirq);
@@ -1189,7 +1191,6 @@ static void rzg2l_gpio_irq_disable(struct irq_data *d) 
	spin_unlock_irqrestore(&pctrl->lock, flags);



	gpiochip_disable_irq(gc, hwirq);

	irq_chip_disable_parent(d);

}



static void rzg2l_gpio_irq_enable(struct irq_data *d)
@@ -1484,7 +1485,7 @@ static int rzg2l_pinctrl_probe(struct platform_device *pdev) 
	struct clk *clk;

	int ret;



	BUILD_BUG_ON(ARRAY_SIZE(rzg2l_gpio_configs) * RZG2L_PINS_PER_PORT >

	BUILD_BUG_ON(ARRAY_SIZE(r9a07g044_gpio_configs) * RZG2L_PINS_PER_PORT >

		     ARRAY_SIZE(rzg2l_gpio_names));



	BUILD_BUG_ON(ARRAY_SIZE(r9a07g043_gpio_configs) * RZG2L_PINS_PER_PORT >
@@ -1534,10 +1535,10 @@ static struct rzg2l_pinctrl_data r9a07g043_data = { 


static struct rzg2l_pinctrl_data r9a07g044_data = {

	.port_pins = rzg2l_gpio_names,

	.port_pin_configs = rzg2l_gpio_configs,

	.n_ports = ARRAY_SIZE(rzg2l_gpio_configs),

	.port_pin_configs = r9a07g044_gpio_configs,

	.n_ports = ARRAY_SIZE(r9a07g044_gpio_configs),

	.dedicated_pins = rzg2l_dedicated_pins.common,

	.n_port_pins = ARRAY_SIZE(rzg2l_gpio_configs) * RZG2L_PINS_PER_PORT,

	.n_port_pins = ARRAY_SIZE(r9a07g044_gpio_configs) * RZG2L_PINS_PER_PORT,

	.n_dedicated_pins = ARRAY_SIZE(rzg2l_dedicated_pins.common) +

		ARRAY_SIZE(rzg2l_dedicated_pins.rzg2l_pins),

};