Commit 0dbdb486 authored by Yann Gautier's avatar Yann Gautier Committed by Alexandre Torgue
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ARM: dts: stm32: update SDMMC clock slew-rate on STM32MP135F-DK board 



Add sdmmc1_clk_pins_a in sdmmc1 pinctrl nodes, to properly manage
clock slew-rate.

Signed-off-by: default avatarYann Gautier <yann.gautier@foss.st.com>
Signed-off-by: default avatarAlexandre Torgue <alexandre.torgue@foss.st.com>
parent 864fdbe7

arch/arm/boot/dts/stm32mp135f-dk.dts

+2 −2
Original line number Diff line number Diff line
@@ -39,8 +39,8 @@ &iwdg2 { 


&sdmmc1 {

	pinctrl-names = "default", "opendrain";

	pinctrl-0 = <&sdmmc1_b4_pins_a>;

	pinctrl-1 = <&sdmmc1_b4_od_pins_a>;

	pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>;

	pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_clk_pins_a>;

	broken-cd;

	disable-wp;

	st,neg-edge;