Unverified Commit 0804f3be authored by Conor Dooley's avatar Conor Dooley Committed by Arnd Bergmann
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riscv: dts: thead: convert isa detection to new properties



Convert the th1520 devicetrees to use the new properties
"riscv,isa-base" & "riscv,isa-extensions".
For compatibility with other projects, "riscv,isa" remains.

Reviewed-by: default avatarJisheng Zhang <jszhang@kernel.org>
Acked-by: default avatarGuo Ren <guoren@kernel.org>
Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20231022154135.3746-1-jszhang@kernel.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 8d4f9145
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+12 −0
Original line number Diff line number Diff line
@@ -20,6 +20,9 @@ c910_0: cpu@0 {
			compatible = "thead,c910", "riscv";
			device_type = "cpu";
			riscv,isa = "rv64imafdc";
			riscv,isa-base = "rv64i";
			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
					       "zifencei", "zihpm";
			reg = <0>;
			i-cache-block-size = <64>;
			i-cache-size = <65536>;
@@ -41,6 +44,9 @@ c910_1: cpu@1 {
			compatible = "thead,c910", "riscv";
			device_type = "cpu";
			riscv,isa = "rv64imafdc";
			riscv,isa-base = "rv64i";
			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
					       "zifencei", "zihpm";
			reg = <1>;
			i-cache-block-size = <64>;
			i-cache-size = <65536>;
@@ -62,6 +68,9 @@ c910_2: cpu@2 {
			compatible = "thead,c910", "riscv";
			device_type = "cpu";
			riscv,isa = "rv64imafdc";
			riscv,isa-base = "rv64i";
			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
					       "zifencei", "zihpm";
			reg = <2>;
			i-cache-block-size = <64>;
			i-cache-size = <65536>;
@@ -83,6 +92,9 @@ c910_3: cpu@3 {
			compatible = "thead,c910", "riscv";
			device_type = "cpu";
			riscv,isa = "rv64imafdc";
			riscv,isa-base = "rv64i";
			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
					       "zifencei", "zihpm";
			reg = <3>;
			i-cache-block-size = <64>;
			i-cache-size = <65536>;