Success and expectations met and cycles
Any failure results in a exception, so it does not report on bad outcomes

verbose computes the dependencies for the failed expect key
added a conway life cell circuit for testing

InterpretiveTester was using wrong low-level call to getValue, fixed it by calling proper one, wrong one did not recompute dependencies before peek or expect

Added interpretive tester spec
Divide by zero currently returns a poisoned zero
implement readWrite memory and some tests

memory test

all interpreter tests run again

Goal is to allow combinational behavior to perform correctly when setting and testing values without cycling
the circuit

a lot of introduced garbage, but now dynamic search can be run with interpretive testerer but not the advanced interpretive tester

Added some mask force width stuff, i need to check in to this further

better tests of it, with latency, enable and masks

Major refactoring of the pipelines and the cycle management of the memory black box in the interpreter

gracefully handle firrtl.Empty node

added randomClock to compute a random clock value (this sould be reviewed with other clock stuff)
log all backend read and write to the dataStore in each memory
Added Dynamic memory search as part of the memory tests

# Conflicts:
#	src/main/scala/firrtl/Parser.scala

A few more asserts in Concretes
Fixed a couple of edge cases in test int generators
Memory interface being implemented, key port and field matching are starting to work
backing memory store not yet implemented
Memory interface taking sets and gets now
More memory work, setting up low level unit test
cleanup in order but memory read is working with delays
Testing different write and read delays for memory box

Fixes #133

Fixes #113 and Fixes #150

Make EmptyExpression part of WIR