Despite the fact that LinkedHashMaps preserve insertion order in traversal, it
appears that .keys and .keySet return Sets that do not provide the same
guarantee

Style Fixes for Compiler, LoweringCompiler, WIR

* Addressed the fact that a node can be connected to itself (updating reg)

ceil(log(x) / log(2)) does not, in general, round to ceil(log2(x)).
I noticed this because of #297.

Case object for WVoid WInvalid

use case object for Kind

More passes cleanups

no vars for mname, info

More utils cleanups

Fix bits type

Performing a pad on SInt literals results in linting warnings in Verilator.
This commit replaces pad operations on literal values with a literal of the
correct width.

Fixes #172

Bit selecting a literal resulted in invalid Verilog. Legalize now deals with
this by replacing any bits select of UInt or SInt literals with a new literal
composed of the selected bits. Legalize also is now run after PadWidths because
that pass introduces this issue.

Fixes #170

Legalize will wrap the rhs of a connect statement with a bit select primop if
the lhs is of smaller width than the rhs. This bit select is now wrapped in a
asSInt cast if the original rhs was an SInt so that is has the correct type.

Fixes #173

Fix bug where Legalize was generating a bit select for SInts without then
casting to SInt

Fixes #169

Match on GroundType instead of UIntType and SIntType

Revamp mappers