Based on https://github.com/chipsalliance/chisel3/pull/2901.

* allow for zero-width integer literals
* CheckWidths: ensure that width is non-negative

* Enhance find_heap_bound to not go smaller than min_step

Previously, it could accidentally get a step size smaller than the
min_step and just continue looping forever. Now the while loop has a new
termination condition to catch this case.

* Add context to find_heap_bound

This new option allows for checking additional heap sizes in increments
of the min_step above the found minimum heap size.

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* Update protobuf-java to 3.18.3

* Revert commit(s) 4b5cbaf1

* Update protobuf-java to 3.18.3

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Also get rid of whitespace-only lines that were emitted after every when
block.

This is needed for emitting modules that serialize to Strings larger
than 2 GiB (the maximum String size on the JVM). It includes
micro-optimized logic for turning arbitrarily nested when scopes into
Iterable[String].

Ever since introducing the Listener, the firrtl Parser now can hit
errors in the code converting from concrete syntax to abstract syntax
that may be due to syntax errors. These errors are essentially broken
assumptions about the structure of the parsed code because there is an
error. These errors are reported before the standard ANTLR syntax errors
are aggregated and reported, and thus could result in less than elegant
error messages (eg. NullPointerException). Now, the Parser will mask off
such errors in the event of standard syntax errors caught by the
ANTLR-generated parser.

This commit also cleans up some ParserSpec tests slightly to make the
ScalaTest style more canonical.

* Parse version and hardcode emitted version

* Throw error if version is too high

* Parse version even if rest is invalid

* Change pattern match to if statement

* Improve version grammar

* Update tests

* Remove outdated comment

* Simplify grammar and use version class

* Simplify and add no version test

* Fix for conflicting lexer rule

The simple functionality is needed in chiseltest.

* Fix Yosys link
* Update SBT version

Fixes #2516

Previously,

reg r : UInt<8>, clock with :
  reset => (p, UInt<8>(3))
r is invalid

would compile to:

reg r : UInt<8>, clock
r <= UInt<8>(0)

now it compiles to:

reg r : UInt<8>, clock
wire r_1 : UInt<8>
r_1 is invalid
r <= mux(reset, UInt<8>(3), r_1)

This is consistent with the behavior for a reset with an asynchronous
reset.

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Problem: MemConf serialization of MemPorts was not deterministic
and the ordering seems to have changed as we move projects to 2.13
Downstream project can be adversely affected by changes in ordering
This changes specifies as specific ordering that should be compatible with
the historical one.

It is unclear if having more than one circuit annotation even works. If
it does, it is implausible that they would have the same circuit name
since that would correspond to a namespace collision.

Update `findTypeHints` to allow for the "class" field in JSON objects to
appear anywhere in the object. This used to rely on the field being the
very first in the object, which is easily violated when reading JSON
data generated externally, since an object's order of fields is
unspecified and can be arbitrarily scrambled.

Fixes #2497.