- May 17, 2021
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Jiuyang Liu authored
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Jiuyang Liu authored
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Jiuyang Liu authored
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- May 15, 2021
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Jack Koenig authored
This function will safely wrap any unserializeable annotations in UnserializeableAnnotations so that they can be safely serialized to JSON for logging.
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- May 14, 2021
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Scala Steward authored
Co-authored-by:mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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Scala Steward authored
Co-authored-by:mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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Jared Barocsi authored
* Implement MFC-style source locator compression * Fix formatting issues * Fix emitting empty FileInfo if the firrtl doesn't have one * Remove '.scala' requirement in FileInfo parsing regex * Handle parsing of FileInfos with no line/col nums * Split FileInfos only if they match This should fix any issues with FileInfos that do not use the "file line:col" format, and allow any valid firrtl using these info comments to compile. * Add unit tests for locator compression * Move InfoTests to InfoSpec class * Fix existing unit tests with fileinfo comments * Add unit tests to ignore the algorithm's own output
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- May 11, 2021
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Scala Steward authored
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- May 10, 2021
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Scala Steward authored
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Scala Steward authored
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- May 09, 2021
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Jiuyang Liu authored
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- May 05, 2021
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Jack Koenig authored
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Jack Koenig authored
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Scala Steward authored
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- Apr 29, 2021
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Scala Steward authored
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Scala Steward authored
Co-authored-by:
Jiuyang Liu <liu@jiuyang.me> Co-authored-by:
mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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Scala Steward authored
Co-authored-by:
mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> Co-authored-by:
Jiuyang Liu <liu@jiuyang.me>
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Scala Steward authored
Co-authored-by:
Jiuyang Liu <liu@jiuyang.me> Co-authored-by:
mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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Scala Steward authored
Co-authored-by:
Jiuyang Liu <liu@jiuyang.me> Co-authored-by:
mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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Scala Steward authored
Co-authored-by:Jiuyang Liu <liu@jiuyang.me>
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Scala Steward authored
Co-authored-by:
Jiuyang Liu <liu@jiuyang.me> Co-authored-by:
mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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Scala Steward authored
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- Apr 28, 2021
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Scala Steward authored
Co-authored-by:Jiuyang Liu <liu@jiuyang.me>
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Scala Steward authored
Co-authored-by:Jiuyang Liu <liu@jiuyang.me>
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- Apr 27, 2021
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Jiuyang Liu authored
* remove all deprecations, switch to new API. * Add MemLibOutConfigFileAnnotation to replace ConfWriter. * Inline CreateMemoryAnnotations in ReplSeqMem. * Dont use ConfWriter anymore. * Fix ReplSeqMemTests, rewrite checkMemConf to directly read from annoation. * Fix for review. 0. Since DependencyAPI only initiate transform only once, ListBuffer is dangerous to use, remove defAnnotatedMemories from Transform. 1. Add trait HasAnnotatedMemories to store ListBuffer, MemLibOutConfigFileAnnotation also extends from which now. * Use two annotations converting and storing DefMemory. 0. rewrite CreateMemoryAnnotations to match ReplSeqMemAnnotation creating PinAnnotation. 1. add DumpMemoryAnnotations to convert from AnnotatedMemoriesCollectorAnnotation to MemLibOutConfigFileAnnotation 2. refactor MemLibOutConfigFileAnnotation and remove HasAnnotatedMemories 3. add private AnnotatedMemoriesCollectorAnnotation to store mutable DefAnnotatedMemory 4. change ReplSeqMem to SeqTransform * Fix for review. 0. replace AnnotatedMemoriesCollectorAnnotation with immutable AnnotatedMemoriesAnnotation. 1. add ListBuffer[DefAnnotatedMemory] in ReplaceMemMacros.execute. * private functions in ReplaceMemMacros transform. * scalafmt * remove ConfWriter API.
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Jiuyang Liu authored
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- Apr 22, 2021
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Fabian Schuiki authored
Looks like a typo/auto-merge hiccup.
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- Apr 20, 2021
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github-actions[bot] authored
Co-authored-by:jackkoenig <jackkoenig@users.noreply.github.com>
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Jack Koenig authored
With Stage/Phase, users can provide complex functionality at the phase level rather than just the transform level. It is useful to have the same logging information at that level. Note that this change still logs transforms in the same way, but now the time in inclusive of annotation renaming which can also [unfortunately] be slow. Co-authored-by:mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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Jack Koenig authored
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- Apr 19, 2021
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Albert Magyar authored
* Fixes #2173
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- Apr 17, 2021
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Jack Koenig authored
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- Apr 16, 2021
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Fabian Schuiki authored
Constant propagation of the Xor op folds `xor(a, SInt(0))` to `asUInt(a)`. For comparison, Or folds to `asUInt(pad(a, W))`. This can be a problem in the following case: circuit Foo : module Foo : input a: UInt<3> output b: UInt<4> b <= asUInt(xor(asSInt(a), SInt<4>(0))) This would emit the assignment as `b = a` instead of the sign-extended `b = {{1{a[2]}},a}`. This requires adjusting the `pad(e, t)` function use in const prop, which currently just inserts a `Pad` prim op with the requested output type. However, the function advertises that it pads *to the width* of the type `t`. Some of the folds rely on this and request the padding of a SInt<N> to the width of a UInt<M>. But the current implementation then then actually returns a `Pad` op with type UInt<M>, instead of the SInt<M> that was requested. -
Jack Koenig authored
Also make minor updates to CI workflow
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- Apr 14, 2021
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Jared Barocsi authored
Using Utils.indent() gives deprecation warnings to use Serializer instead. However, the Serializer class itself doesn't provide a means to manually indent a FirrtlNode string a certain number of times. The indent variable, previously hardcoded to 0, is now exposed as a second parameter for the modified serialize function, and the old serialize function just calls the modified serialize with indents = 0 for binary compatibility Co-authored-by:Megan Wachs <megan@sifive.com>
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- Apr 12, 2021
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edwardcwang authored
* bitWidth: add scaladoc * smt: use existing bitWidth API
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- Apr 07, 2021
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Jack Koenig authored
To maintain binary compatibility, InlineAcrossCasts is just aliases to the now deprecated InlineCasts. We can make the binary incompatible change of renaming the class and object for 1.5. Co-authored-by:mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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- Apr 06, 2021
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Albert Magyar authored
Add -fpga flag to enable FPGA-oriented compilation strategies (currently for memories)
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Albert Magyar authored
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Albert Magyar authored
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