Lower Types pass. #53

Add a renameall pass that renames nodes according to a user-provided map.

map.

Also rewrite main so stanza and scala passes can be intermixed.

The transformation works! Kind of, it works fine when everything is alwasy ready, has some weird issues when they're not, but also kind of works in that the hardware verifier still reports the right answer, it seems to go to half duty cycle and then do every token twice

Working on generating SimTop, need to figure out how to split the top-level IO between the sim modules.

Everything is broken, need Translator to work on files without a circuit, need to parse queue module text in midas/Utils.scala, need to create (src, dst) -> Module mapping in midas/Fame.scala

Changing simwrapper to group ports that go to different places, not quite there yet. Will allow simple bulk connecting at top-level

In process of adding FAME-1 transformation, updated todos in grammar file, updated Makefile to play nicer when firrtl is a submodule, fixed bug in Translator for single line scopes, fixed firrtl-scala script to point to firrtl.Driver instead of old firrtl.Test

Deleted extranous passes.stanza comments, updated standard passes. Added support for -b <backend> flag without any other specified passes in stanza, updated parser tests to work with stanza implementation.

Added support for -b <backend> so that specific passes can be run then a backend can be applied. Added firrtl compiler for emitting firrtl

Conflicts:
	Makefile

Updated Scala FIRRTL with Testing and Infer-Types Pass

Reorganized Primops (renamed from PrimOps), added maps and functions to convert object <=> string, added eqv and neqv

Added infer-types pass, seems to work. Added infer-types error checking, modified Logger slightly, added Primops object for utility functions, minor changes in Utils