- Nov 23, 2019
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Adam Izraelevitz authored
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Adam Izraelevitz authored
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Adam Izraelevitz authored
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- Nov 22, 2019
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Schuyler Eldridge authored
* Add CCC20 Info at README top Signed-off-by:
Schuyler Eldridge <schuyler.eldridge@ibm.com> * Add Upcoming Events h2 Heading to README.md Signed-off-by:
Schuyler Eldridge <schuyler.eldridge@ibm.com>
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- Nov 18, 2019
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Andrew Waterman authored
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- Nov 16, 2019
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John's Brew authored
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- Nov 13, 2019
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Jim Lawson authored
* Add brief description of (current) chisel versioning and version recommendations. * Respond to comments. Replace "semantic versioning" with "a form of semantic versioning". * Respond to comments - replace mmddyy with yyyymmdd. * Mention change in SNAPSHOT naming.
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- Nov 06, 2019
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Schuyler Eldridge authored
Don't use MuxLookup default for full mapping
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Albert Magyar authored
Signed-off-by:
Schuyler Eldridge <schuyler.eldridge@ibm.com> Co-authored-by:
Schuyler Eldridge <schuyler.eldridge@ibm.com> Co-authored-by:
Albert Magyar <albert.magyar@gmail.com>
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Schuyler Eldridge authored
This modifies MuxLookup to not use the 'default' mapping argument if a "full" mapping is provided. A "full" mapping enumerates all possible cases for a 'key' argument of a known size. This will check literal values to ensure exhaustiveness holds. Signed-off-by:
Schuyler Eldridge <schuyler.eldridge@ibm.com> Co-authored-by:
Schuyler Eldridge <schuyler.eldridge@ibm.com> Co-authored-by:
Albert Magyar <albert.magyar@gmail.com>
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Jack Koenig authored
Accomplished by changing the code gen for casting literals to aggregates. Rather than connecting the literal to a wire that is then bit selected from, just bit select from the literal which saves the creation of an intermediate wire and matches FIRRTL's semantics for legal async reset initial values.
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Jim Lawson authored
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- Nov 02, 2019
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Schuyler Eldridge authored
Improve naming of anonymous/class-in-function Modules
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Schuyler Eldridge authored
Signed-off-by:Schuyler Eldridge <schuyler.eldridge@ibm.com>
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Schuyler Eldridge authored
This changes the desired name of a Module to provide non-numeric naming for anonymous Modules and Modules defined inside function bodies. Signed-off-by:Schuyler Eldridge <schuyler.eldridge@ibm.com>
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- Oct 24, 2019
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Schuyler Eldridge authored
Make ChiselStage targets not private
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Colin Schmidt authored
This enables users to use the nice run method of `ChiselStage` with their own set of phases.
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- Oct 22, 2019
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Schuyler Eldridge authored
Internal BoringUtils.bore Bug Fix
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Schuyler Eldridge authored
Signed-off-by:Schuyler Eldridge <schuyler.eldridge@ibm.com>
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Schuyler Eldridge authored
This fixes a bug where internal boring using BoringUtils.bore would fail because it was using instanceName which cannot be called before the module closes. Previously, this meant that BoringUtils.bore would work for boring instances (which are closed in a parent), but not for boring signals in the current, unclosed module. Signed-off-by:Schuyler Eldridge <schuyler.eldridge@ibm.com>
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- Oct 19, 2019
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Chick Markley authored
Plan to be released with 3.3. Breaks experimental Range API. Adds new Interval type and associated support. This commit adds the following: - Renamed Range to IntervalRange to avoid name collision with scala Range - Changed RangeTransform macro to Return an IntervalRange - Improved error messages on missing comma or decimal - Added notational support for binary point - Some formatting cleanup also - SIntFactory - Change to use IntervalRange API - UIntFactory - UInt from range has custom width computation - It does not need to deal with lowerbound extending bit requirements - Code to handle special case of range"[0,0]" to have a width of 1 - IR.scala - Removed Bound and other constraint code that was duplicating firrtl stuff - Added new RangeType - Added IntervalRange class and object - RangeSpec - modified just a bit to handle notational differences - previous range interpolator returned tuple now returns IntervalRange - Add IntervalType to emitter - Added IntervalSpec with many tests - Added ScalaIntervalSimulatorSpec which tests golden model for Interval - Added ScalaIntervalSimulator which is a golden model for Interval - This gold may not have been polished to a high sheen - Add IntervalLit cases to Converter - Add Interval PrimOps to IR - asInterval, wrap, squz, clip, setp, decp, incp - Add IntervalLit class to IR - Add Interval to MonoConnect - Add Interval Type to Bits (in experimental package) - add conversions to Interval from other types - Add Interval clone stuff to Data - Add Literal creation helpers to chisel3 package - these may move to experimental if I can figure that out
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- Oct 08, 2019
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Jack Koenig authored
Dynamically indexing a Vec of Flipped bidirectional Bundles would get the wrong directions on the elements of the Bundles Fixes #1192
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Schuyler Eldridge authored
Strip Object and Outer Class from desiredName
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Schuyler Eldridge authored
Signed-off-by:Schuyler Eldridge <schuyler.eldridge@ibm.com>
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- Oct 01, 2019
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Jim Lawson authored
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- Sep 28, 2019
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Schuyler Eldridge authored
More README.md fixes
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- Sep 27, 2019
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Schuyler Eldridge authored
- Scaladoc for "latest" is 2.11, so use a 2.11-style link - Use full path for SETUP.md - Switch migration guide to point to website version over wiki Signed-off-by:Schuyler Eldridge <schuyler.eldridge@ibm.com>
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- Sep 26, 2019
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Schuyler Eldridge authored
Use raw link for FIR filter
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Schuyler Eldridge authored
Signed-off-by:Schuyler Eldridge <schuyler.eldridge@ibm.com>
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Schuyler Eldridge authored
Readme Fixes
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Schuyler Eldridge authored
Signed-off-by:Schuyler Eldridge <schuyler.eldridge@ibm.com>
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Schuyler Eldridge authored
Signed-off-by:Schuyler Eldridge <schuyler.eldridge@ibm.com>
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Schuyler Eldridge authored
Signed-off-by:Schuyler Eldridge <schuyler.eldridge@ibm.com>
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Schuyler Eldridge authored
Signed-off-by:Schuyler Eldridge <schuyler.eldridge@ibm.com>
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- Sep 20, 2019
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Leway Colin authored
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- Sep 18, 2019
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Boris V.Kuznetsov authored
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- Sep 17, 2019
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Jack Koenig authored
* Add a tree reduce function to Vec * Change function names of reduce operation function in Vec * Change reference to single layer operation in Vec.reduce * Commint name change for pair macro * Remove pair, call not necessary and can just be used from grouped(2) and map * Changed to reduceTree, added default identity function for single reduce. * Change style of Vec.reduceTree and tests to chisel3 and canonical Scala style * Cleanup Vec initialization, implicitCompileOptions
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Jack Koenig authored
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- Sep 14, 2019
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Jack Koenig authored
FIRRTL barfs on negative and zero-sized memories
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Jack Koenig authored
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