* ir: use Serializer.serialize where possible

* ir.Serializer: serialize MultiInfo correctly

* ir.Serializer: empty body needs to result in a skip statement

The firrtl grammar requires at least one statement.

* ir.Serializer: correctly serialize fixed point types and literals

* Serializer: change Seq -> Iterable in order to be Scala 2.13 compatible

Scala 2.13 support

0.9.16+ fixes https://github.com/scalacenter/scalafix/issues/1109
-Ywarn-unused-imports seems to be no longer supported by 2.13:
https://github.com/scala/scala/releases/tag/v2.13.0

This should not be needed in firrtl.

The values end up being converted to BigDecimal
anyways.

Extending HashMap is discouraged.

semanticdb seemed to be missing a 2.13 package

* WiringUtils.sinksToSources: make sinkInsts order deterministic

* WiringUtils: make owners a LinkedHashMap

* Wiring: only make something a Wire if it isn't a port already

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

* InferTypesFlowsAndKindsSpec: test the results of InferTypes, ResolveKinds and ResolveFlows

* Don't use passes sub-package in tests

This changes two test files using the "passes" sub-package to
"firrtl.passes". This allows a new "firrtlTests.passes" package to be
freely created and used without a name collision.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

* ResolveFlows: only depends on types and working ir

The types are needed to know the orientation of
a bundle field of a SubField node.

* InferTypes: fix bugs with unknown widths on ports and memories

* LoweringCompileSpec: Uniquify pass moved

Co-authored-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

* RenameMapSpec: try rename instance and port

* RenameMapSpec: explicit chaining is required

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

dshl amount must be < 20 bits, not <= 20 bits.

Resolves #1794

Create new scopes for child statements of Conditionally

* See #1505
* Inferred mports are implicitly added to scope of their parent mem
* This allows current chisel3 emission to work with new scope checks
* This may change in a future refactor of CHIRRTL memory ports

* Add specific test for shadowing

* Fixes #1505

* See freechipsproject/chisel3#1408

Add a Treadle build to the portion of CI that runs Chisel3 tests.
Chisel3 needs to have a master copy of Treadle in order for it to
work and cannot rely on resolution from Maven.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Move new transforms, recently added, into existing or new sets of
transforms (defined in firrtl.stage.Forms).

One transform is a mandatory low FIRRTL optimization:

  - firrtl.transforms.LegalizeAndReductionsTransform

Previously, this was included as a prerequisite of all Verilog
emitters (minimum, normal, and SystemVerilog).

Two transforms associated with converting and removing the new
verification statements are moved into a new set of transforms,
AssertsRemoved:

  - firrtl.transforms.formal.ConvertAsserts
  - firrtl.transforms.formal.RemoveVerificationStatements

Previously, these transforms were directly added as prerequisites to
the minimum Verilog and normal Verilog emitter, but not the
SystemVerilog emitter.

The designation of inputForm=LowForm for legacy, custom transforms is
updated to include assertion removal transforms as part of their
optionalPrerequisites. This has the effect of continuing to cause
inputForm=LowForm transforms to run as late as possible (right before
the low FIRRTL, minimum Verilog, Verilog, or SystemVeriog emitter).

Tests are updated to reflect the new order in both CustomTransformSpec
and LoweringCompilersSpec.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

* add sign-extend const-prop test

* Emitter: don't wrap Neg operand in concat

* add const prop bitwise reduction equivalence test

* mask negative literals when propagating reduction

* change widths

* get rid of unnecessary if

* add BigInt mask utility

* ConstProp: test bitwise op of signed literals

* ConstProp: use bit mask for FoldOr/FoldXor

* handle and also

* add UIntLiteral.masked helper

Co-authored-by: Jack Koenig <koenig@sifive.com>

* test const prop of addition of negative literals

* Emitter: handle minimum negative values correctly

* update expected verilog in AsyncResetSpec

Change the class-global, but private ConstraintSolver object inside
InferWidths to instead be constructed on each execute invocation. This
prevents issues with thread safety where running the same InferWidths
object at the same time would cause the ConstraintSolver to get
trampled on.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

* dedup: add faster InstanceGraph implementation and use it in dedup

The new implementation takes care not to hash the instance
types contained in DefInstance nodes.
This should make dedup considerably faster.

* FastInstanceGraph: cache vertices for faster findInstancesInHierarchy

* FastInstanceGraph: remove the parent name field since it isn't actually necessary

* FastInstanceGraph -> InstanceKeyGraph

* InstanceGraph: describe performance problems.

* InstanceKeyGraph: turn moduleMap into a def instead of a val

This will make changing implementation details much easier
in the future.

* InstanceKeyGraph: return childInstances as Seq instead of Map

This ensures a deterministic iteration order and it
can easily be turned into a Map for O(1) accesses.

* InstanceKeyGraph: add tests for public methods

* InstanceKeyGraph: group public methods together

* InstanceKeyGraphSpec: fix wording of a comment

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

Add cross-building of unidoc to test issues if a user later does a
+publishLocal (like with Chisel CI).

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Fix Fuzzer for 2.11