Change InlineSpec to expect "_" and not "$"

A FIRRTL change to inlining changes the inlined instance delimiter to "_"
from "$". This change is reflected here in an update to the associated
Chisel tests for the Inline API.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

* Modify noenq to set the input wires to DontCare.

- Add dumpAnnotations method to Driver

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

The litOption field currently has no type that can be inferred. Some
subtypes override it and give it a type, but the original declaration
should have a type so things like bundles can override it.

API Documentation Improvements

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Minor updates to Element's documentation to conform with ScalaDoc style.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Adds documentation of Arithmetic, Bitwise, and Comparison operators for
SInt.

The duplication of documentation between UInt and SInt strongly indicate a
unification around Num would make sense.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

This adds documentation of Arithmetic, Comparison, and Bitwise operator
methods of UInt.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

This includes general documentation for the arithmetic and comparison
operators of Num.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

This puts Data's connection methods, `:=` and `<>`, in the ScalaDoc
`Connect` group. These groups will propagate through to all children of
Data, e.g., UInt, and cause those methods to be grouped in the ScalaDoc of
these children.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

This places all do_* methods (and two unary methods in SInt and FixedPoint
that act like do_* methods) inside the ScalaDoc group
"SourceInfoTransformMacro". Classes/objects which need information about
this group have an additional bare trait mixed in, `SourceInfoDoc`, that
provides information about the group and its priority.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

This adds the `-groups` option to `scalacOptions`. This makes ScalaDoc
build with group support such that developers can group methods using the
`@group <groupName>` tag.

This also adds the `-skip-packages chisel3.internal` option. This makes
ScalaDoc build while ignoring everything in the chisel3.internal package.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

This adds the ScalaDoc group "Connect" to the Data class.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

This adds a bare trait that provides a ScalaDoc group,
`SourceInfoTransformMacro`, that is intended to group all `do_*` methods
in one place in the documentation. This provides a group description for
this group and a priority (1001) which is lower than all other normal
groups (the lowest priority is supposed to be 1000).

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

This bumps scopt from 3.6.0 to 3.7.0 to align with FIRRTL. FIRRTL
requires 3.7.0+ for added scopt methods that allow introspection
of options (e.g., examing the short options of a long option).
This bump avoids a compile-time warning due to the version
mistmatch.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

* Ability to load memories at simulation startup
* first pass
* create annotation
* create skeleton Transform

* Work in progress
Building out transform and pass now

* Support for LoadMemory annotation
* Creates chisel and firrtl LoadMemory annotations
* LoadMemoryTransform converts annotation into BlackBox InLine
* Simple test that verilog bound modules get created.

* Support for LoadMemory annotation
* Supports Bundled/multi-field memories
* more tests
* support for `$readmemh` and `$readmemb`
* warns if suffix used in file specification.

* Support for LoadMemory annotation
* Use standard chisel annotation idiom

* Support for LoadMemory annotation
* Fixes for @seldridge nits and super-nits

* Support for LoadMemory annotation
- transform now only runs if emitter is an instance of VerilogEmitter
- suffixes on memory text files are now respected
  - if suffix exists and memory is aggregate, aggregate sub-fields will now be inserte...

* Inhibit aggressive resource file name mangling.
This addresses #883.

* Use common method to write resources to a directory to keep file names consistent.

Add instance inline API

This adds a new trait, FlattenInstance, to chisel3.util.experimental. When
mixed into a module or a specific instance this trait will "flatten",
i.e., "inline that module and all of its submodules".

This includes testing (additions to InlineSpec) and ScalaDoc
documentation.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

This adds a new trait, InlineInstance, to chisel3.util.experimental. This
trait, when mixed into a specific module or instance, will "inline" that
module, i.e., "collapse a module while preserving it's submodules."

This includes testing (InlineSpec) and ScalaDoc documentation.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

We can sometimes shim with other workarounds like VecInit or manually
creating a mux