* Updating to keep up with Direction mega PR
Fix several classes to use ActualDirection/DataMirror.directionOf API
Fixed up Flip and UInt literal api references in several tests

* refactored to create a command editor that can be applied here
and maybe to verilog or other external commands

* Updating to keep up with Direction mega PR
Fix several classes to use ActualDirection/DataMirror.directionOf API
Fixed up Flip and UInt literal api references in several tests

* Provide new flags to allow modification of VCS command
New flag "--more-vcs-flags" to add additional flags to VCS command line
New flag "--more-vcs-c-flags" to add additional flags to CFLAGS portion of VCS command line
Provide simple test in ToolChainSpec to show command line construction
Refactored PeekPokeTesterUtils to make above test easier to implement

* Updating to keep up with Direction mega PR
Fix several classes to use ActualDirection/DataMirror.directionOf API
Fixed up Flip and UInt literal api references in several tests

* Fix problem with --no-check-comb-loops and verilator
annotation was not being passed down
requires [Firrtl PR #619](https://github.com/freechipsproject/firrtl/pull/619) to be merged

* Fix problem with --no-check-comb-loops and firrtl-interpreter
annotation was not being passed down to the interpreter's lowering pass.

> This is built on top of the PR #157.  And needs to be merged at the same time as [Interpreter fixes PR #87](https://github.com/freechipsproject/firrtl-interpreter/pull/87)

* A bit of cleanup to HasCycleTest

* Updating to keep up with Direction mega PR
Fix several classes to use ActualDirection/DataMirror.directionOf API
Fixed up Flip and UInt literal api references in several tests

* Fix problem with --no-check-comb-loops and verilator
annotation was not being passed down
requires [Firrtl PR #619](https://github.com/freechipsproject/firrtl/pull/619) to be merged

Fix several classes to use ActualDirection/DataMirror.directionOf API
Fixed up Flip and UInt literal api references in several tests

* Fix double elaboration of DUT when using the interpreter
setUpFirrtlBackend was failing to use the previously emitted firrtl code

* Fixed further problem, that although proper pass was not called, the resultant low firrtl was not used.
This is now fixed.
interpreter backend now forces low compiler to be called.
this fix required one of the driver tests to fail, that is fixed
also fixed some intellij files being tracked by git that shouldn't be
made work

Added tests for this

* Custom transforms were not being run when using verilator backend

* Fix custom transforms not being passed to compileAndEmit correctly
Brings VCSBackend more in line with VerilatorBackend
Some nit cleanup on VCSBackend
Fixed broken VecFillSpec

Reg(init -> RegInit(
log2Up -> Log2Ceil

* Reworked the VerilatorCppHarnessCompiler stuff.  It seemed to be unnecessarily using Transforms to do a simple template substitution.
chiselMain had it's own hooks into the above.  Cleaned this up as much as I dared
Fix deprecated code
Reg(init -> RegInit(
log2Up -> Log2Ceil
Fixed up style (I needed this to debug this mess)

* Got rid of chisel2 Module references

* Incorporate Angie's Bundle -> Record changes for PeekPokeTesterUtils

I'm unilaterally committing this PR so chisel-testers compiles with the current version of firrtl.

* --test-command was broken
fix --test-command so that it is used in verilator and vcs backends
add test to DriverSpec to illustrate it's use.
added two other tests to DriverSpec to illustrate overriding directories

* fix vcs default command, was inadvertantly copied from verilator

* fixed sign out of verilator for when bitLength isn't as expected

* there were unfixed succcess typos

Fix spelling of ChiselExecutionSuccess.

* black box annotations working but verilator does not know to open the right file

* vcs and verilator backends now have annotated black box verilog implementations delivered to the build directory
this is done by a firrtl transform
Test that this adding is done correctly

* removed dangling transform from VerilatorCppHarness, transform is now added in firrtl backend
made tests safely

* More ScalaTestey specs

* Update syntax

* Remove FlatSpec dependency

* Add Bool-specific test access

* Remove operators in favor of poke/check, add tests for Bool/Booleans and inline DUT

* Reflect the fact that FixedPoint is experimental.

* Add import of chisel3.experimental for FixedPoint.

* Support Record as superclass of Bundle for custom Aggregate types - fix #88

* Reflect the fact that FixedPoint is experimental.

* Add import of chisel3.experimental for FixedPoint.

* API change to peek and expect with SInts
Change PeekPokeTester #peek and #expect to return signed BigInt if the signalId they are given is an SInt
Add a signed adder test to confirm this works
This needs to be further built out with fixed point

* make peek work with negative fixed pt numbers

* actually pass options manager to the driver's dynamic variable so the tester has access to it

* make optionsmanager public

Fixed by making long specific poke functions
Added test for behavior reported in Issue #425