- Feb 20, 2022
-
-
Schuyler Eldridge authored
Signed-off-by:Schuyler Eldridge <schuyler.eldridge@sifive.com>
-
- Feb 19, 2022
-
-
Schuyler Eldridge authored
Add Annotation support and conversion to firtool CLI options.
-
Schuyler Eldridge authored
Add numerous tests that are checking the behavior of annotation passing and consumption by CIRCT. This adds tests for: - InlineInstance - FlattenInstance - dontTouch (of wires and nodes) - forceName (of modules only) - Deduplication and doNotDedup Signed-off-by:Schuyler Eldridge <schuyler.eldridge@sifive.com>
-
Schuyler Eldridge authored
Change ChiselStage to pass annotations to firtool via a file. Also, add logic to remove lots of annotations and convert them to equivalent firtool options. Any annotations that we don't know what to do with are passed on to firtool to let it deal with them. This has the effect of both communicating things like DontTouchAnnotation and also providing information to the user that they are passing annotations that firtool doesn't know how to handle. To do the latter checking "-warn-on-unprocessed-annotations" is turned on. Signed-off-by:Schuyler Eldridge <schuyler.eldridge@sifive.com>
-
Schuyler Eldridge authored
Change the default handover from optimized low FIRRTL to CHIRRTL. This is done because CIRCT is an essentially complete FIRRTL compiler now. Signed-off-by:Schuyler Eldridge <schuyler.eldridge@sifive.com>
-
Schuyler Eldridge authored
Add Scala 2.13, enable 2.13 CI
-
Schuyler Eldridge authored
Signed-off-by:Schuyler Eldridge <schuyler.eldridge@sifive.com>
-
- Jan 17, 2022
-
-
Jiuyang Liu authored
* add mill build system * bump to Chisel 3.5.0 * use cross build to select Scala version. * add gitignore * Add/use Compiler Plugin
-
Schuyler Eldridge authored
Signed-off-by:Schuyler Eldridge <schuyler.eldridge@sifive.com>
-
- Jun 22, 2021
-
-
Schuyler Eldridge authored
Change "RTL" to "HW"
-
Schuyler Eldridge authored
Signed-off-by:Schuyler Eldridge <schuyler.eldridge@sifive.com>
-
- Apr 22, 2021
-
-
Schuyler Eldridge authored
Signed-off-by:Schuyler Eldridge <schuyler.eldridge@sifive.com>
-
Schuyler Eldridge authored
Change command line option passed to "firtool" due to upstream change. Signed-off-by:Schuyler Eldridge <schuyler.eldridge@sifive.com>
-
Schuyler Eldridge authored
Signed-off-by:Schuyler Eldridge <schuyler.eldridge@sifive.com>
-
Schuyler Eldridge authored
Add an option to output using a "*.v" suffix. This is still using the CIRCT SystemVerilog back end, though. Signed-off-by:Schuyler Eldridge <schuyler.eldridge@sifive.com>
-
Schuyler Eldridge authored
Signed-off-by:Schuyler Eldridge <schuyler.eldridge@sifive.com>
-
- Jan 28, 2021
-
-
Schuyler Eldridge authored
- Add Maven release, Sonatype snapshots, and Javadoc.io badges - Improve setup instructions Signed-off-by:Schuyler Eldridge <schuyler.eldridge@sifive.com>
-
Schuyler Eldridge authored
Signed-off-by:Schuyler Eldridge <schuyler.eldridge@sifive.com>
-
- Jan 27, 2021
-
-
Schuyler Eldridge authored
Add publishing to sonatype
-
Schuyler Eldridge authored
Signed-off-by:Schuyler Eldridge <schuyler.eldridge@sifive.com>
-
- Jan 16, 2021
-
-
Schuyler Eldridge authored
Add --handover option to lower partially using SFC
-
Schuyler Eldridge authored
Add a "handover" option that augments circt.stage.ChiselStage to lower using a combination of the Scala FIRRTL Compiler (SFC) followed by CIRCT. The handover can be set at CHIRRTL (don't run the SFC), High FIRRTL, Middle FIRRTL, Low FIRRTL, or Optimized Low FIRRTL. Include tests of this behavior by looking at the FirrtlCircuitAnnotation that exists before running CIRCT for different handover values. Signed-off-by:Schuyler Eldridge <schuyler.eldridge@sifive.com>
-
Schuyler Eldridge authored
Add CI
-
Schuyler Eldridge authored
Signed-off-by:Schuyler Eldridge <schuyler.eldridge@sifive.com>
-
- Jan 14, 2021
-
-
Schuyler Eldridge authored
Signed-off-by:Schuyler Eldridge <schuyler.eldridge@sifive.com>
-
Schuyler Eldridge authored
Signed-off-by:Schuyler Eldridge <schuyler.eldridge@sifive.com>
-