- Feb 22, 2024
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mergify[bot] authored
This allows Properties to be used to build up expressions in terms of input Properties and literals. (cherry picked from commit 11844a40 ) Co-authored-by:
Mike Urbach <mike.urbach@sifive.com>
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- Feb 21, 2024
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mergify[bot] authored
(cherry picked from commit 4f1f4a77 ) Co-authored-by:
Deborah Soung <debs@sifive.com>
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- Feb 17, 2024
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mergify[bot] authored
(cherry picked from commit 41dd2671 ) Co-authored-by:
Jack Koenig <koenig@sifive.com>
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mergify[bot] authored
(cherry picked from commit 8f0196fa ) Co-authored-by:
Deborah Soung <debs@sifive.com>
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- Feb 10, 2024
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mergify[bot] authored
(cherry picked from commit 84a21f8a ) Co-authored-by:
Jack Koenig <koenig@sifive.com>
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- Feb 01, 2024
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mergify[bot] authored
(cherry picked from commit d21a6635 ) Co-authored-by:
Jack Koenig <koenig@sifive.com>
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- Jan 31, 2024
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mergify[bot] authored
This is in addition to the existing support in Definition.apply. Sometimes it is not possible to use Definition.apply, for example, if you plan to bore ports through the Class being constructed. The new DynamicObject.apply method supports this, and creates a DynamicObject from the newly elaborated Class. (cherry picked from commit 04535d32 ) Co-authored-by:
Mike Urbach <mike.urbach@sifive.com> Co-authored-by:
Jack Koenig <koenig@sifive.com>
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mergify[bot] authored
(cherry picked from commit b3b5ab19 ) Co-authored-by:
Jack Koenig <koenig@sifive.com>
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mergify[bot] authored
This adds support for BoringUtils.bore to bore and connect Property ports. (cherry picked from commit 178d8f06 ) Co-authored-by:
Mike Urbach <mike.urbach@sifive.com>
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mergify[bot] authored
* Support isProperty query in DataMirror. (#3783) This adds an API to DataMirror to query if a Data is a Property. (cherry picked from commit 3b27dcdb ) # Conflicts: # src/test/scala/chiselTests/reflect/DataMirrorSpec.scala * Fix backport merge conflict. --------- Co-authored-by:
Mike Urbach <mike.urbach@sifive.com>
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mergify[bot] authored
Since we override litOption to always be None, we need to override isLit to check the Binding. (cherry picked from commit 7be47bb4 ) Co-authored-by:
Mike Urbach <mike.urbach@sifive.com>
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mergify[bot] authored
(cherry picked from commit d8991c55 ) Co-authored-by:
Megan Wachs <megan@sifive.com>
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mergify[bot] authored
Previously, it was not calling .ref. It was thus not properly: 1. Checking that the clock is bound hardware 2. Checking that the clock is visible in the current scope 3. Reifying the clock if its a view Note that RegInit() was already correctly calling .ref. (cherry picked from commit 1c348c55 ) Co-authored-by:
Jack Koenig <koenig@sifive.com>
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- Jan 28, 2024
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mergify[bot] authored
Module's logic that creates the implicit clock and implicit reset within the Module's body is now implemented in new traits that users are free to mix in to RawModule. There are also now virtual methods implicitClock and implicitReset that the user can override to change what clock or reset is used. (cherry picked from commit abc96e20 ) Co-authored-by:
Jack Koenig <koenig@sifive.com>
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- Jan 20, 2024
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Yinan Xu authored
Users are now able to check whether a Data is visible from the current context via `chisel.reflect.DataMirror.isVisible`.
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Jack Koenig authored
* Bump versions * It now tabs every line included in the Release Notes section of the PR template
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Jack Koenig authored
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- Jan 19, 2024
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Jack Koenig authored
Also fix website API doc link generation, links prior to 3.5.4 are not valid (that is when we started publishing the unidoc properly so that it gets picked up by javadoc.io and the like).
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Chisel Bot authored
Co-authored-by:jackkoenig <jackkoenig@users.noreply.github.com>
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- Jan 16, 2024
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Will Dietz authored
Using `Output()` shouldn't drop important type information, only override the specified direction to force alignment. Until #3647 is addressed, use `cloneTypeFull` to get the expected behavior. The cloned direction information is unnecessary but is overridden by the coerced direction. cc #3647. Co-authored-by:Jack Koenig <koenig@sifive.com>
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- Jan 15, 2024
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Jack Koenig authored
The automation around automatically determining released versions of Chisel and generating content for the website would fail in the period between tagging a new release and the corresponding artifacts actually being released to Maven Central. This would even prevent the CI job trying to push the release to Maven Central. Now, the logic for determining releases will filter for those actually pushed to Maven Central.
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- Jan 14, 2024
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Jack Koenig authored
* Make already deprecated APIs package private * Add deprecation warnings to a few that we missed
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Jack Koenig authored
* Bump SBT to latest (1.9.8) * [CI] Change all ubuntu runners to ubuntu-22.04 This bumps some things running on the older runner which seems to have a problem with SBT 1.9.8. It also removes any uses of ubuntu-latest to ensure that we control the version explicitly.
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Jack Koenig authored
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- Jan 13, 2024
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Jack Koenig authored
* Width, KnownWidth, and Unknown width promoted to package chisel3 * Other classes moved to new package private chisel3.internal.firrtl.ir
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Deborah Soung authored
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- Jan 12, 2024
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Jack Koenig authored
Also change to an object (from a def) so that it shows up in ScalaDoc search.
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Jack Koenig authored
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Jack Koenig authored
This avoids starting any Bloop servers which avoids hangs in CI.
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- Jan 11, 2024
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Chisel Bot authored
* Revert "[binder] Remove firtool-1.61.0 features" * [binder] Implement OM * [binder] Implement probe IR emissions * Change Trace API to only trace leaves (#3682) Change the behavior of the Trace API to only trace leaves. This aligns with recent changes to CIRCT which error if annotations are applied to aggregates which are then mandatorily split due to FIRRTL ABIs. This should have no practical effect on use of the Trace API only that downstream consumers will need to work at the level of leaf types and not on aggregates. * [binder] Truncate for aggregate connection * [binder] Set `inner_sym` only when needed * [binder] Set module visibility * [binder] Add function for exporting split verilog * [binder] Support secret ports * [binder] Refer with `SourceInfo` instead of `MlirLocation` * [binder] Emit IR for probe read * [binder] Handle secret ports for instance * [binder] Fix extmodule emission * [binder] Handle secret commands * [binder] Handle probe ops without `Node` * [binder] Flush the buffer at the end of `Writable` streams * [binder] Keep original integer types from foreign API * [binder] fix return type of asAsyncReset * [cd] Bump CIRCT from firtool-1.61.0 to firtool-1.62.0 Signed-off-by:
Schuyler Eldridge <schuyler.eldridge@sifive.com> Co-authored-by:
Schuyler Eldridge <schuyler.eldridge@sifive.com> Co-authored-by:
Sprite <SpriteOvO@gmail.com> Co-authored-by:
Jiuyang Liu <liu@jiuyang.me> Co-authored-by:
chiselbot <chiselbot@users.noreply.github.com>
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Tynan McAuley authored
Co-authored-by:
Aditya Naik <aditya.naik@sifive.com> Co-authored-by:
Jack Koenig <koenig@sifive.com>
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- Jan 10, 2024
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Jack Koenig authored
To override which firtool is used by Chisel, users should now set environment variable CHISEL_FIRTOOL_PATH (rather than the old FIRTOOL_PATH).
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- Jan 09, 2024
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Carlos Eduardo authored
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- Jan 06, 2024
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Jiuyang Liu authored
bump and update nix to use upstreamed packages
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Jiuyang Liu authored
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Jiuyang Liu authored
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Nandor Licker authored
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- Jan 05, 2024
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Mike Urbach authored
When creating large numbers of Definitions, copying the globalNamespace back and forth becomes a performance bottleneck.
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- Jan 04, 2024
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Jack Koenig authored
Now it will fetch llvm-firtool with classifier for the current system rather than the full artifact which contains binaries for all platforms.
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- Jan 03, 2024
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Yinan Xu authored
Legacy `--print-ir-after-all` has been replaced by this new argument.
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