Multi chip coherence

When the entire AXI4 address space is small (for example, a 4kB test
device), it is possible for a single AXI burst to be larger than the
available address bits on the bus. Handle this case gracefully.

Fixes #1683

* adding getOMComponents

This could be triggered whenever an A=>D source gets reused before
the outstanding GrantAck comes back.

Update README reference to fpga-zynq.

* Added Object Model case classes

* Added objectionModelInstance function to SimpleDevice

* Added object model JSON elaboration artifact.

* Added companion object and OMISA factory

This saves time and links to the blog for newcomers who keep banging
their head against the wall when they can't compile custom example
programs.

subsystem: allow PeripheryBuses to support wider atomics

Make clock_en_reg disappear when clockGate = false

Handle subsystem bus interconnectivity in child classes of BaseSubsystem pt 2

Handle subsystem bus interconnectivity in child classes of BaseSubsystem

Move sbus.control_bus to subsystem level