Synchronizer Primitive Updates (#2212)

* Build AsyncResetSynchronizerShiftReg from new SynchronizerPrimitive

* SyncResetSychronizer: Construct out of single bit shift regs

* ShiftReg: Add comment to distinguish types

* Synchronizers: Refactor how the SynchronizerShiftReg are done internally

* Synchronizers: no longer allow specification of reset value

* Synchronizers: remove some redundant withReset

* Synchronizers: update interrupt crossings to deal with the requirement that async crossings are truly async and marked with SynchronizerPrimitiveShiftReg

* AsyncQueue: only use synchronizers of a fixed depth

* Synchronizers: Add initial values back to the API

* Debug Synchronizers: revert change now that initialization is back in the API

* synchronizers: fix typo in parameter ordering, restore some additional API

* Crossing: deprecate instead of delete the heavily used IntSyncCrossingSink API for asynchronous interrupt crossings

* Synchronizers: fix the postfixing of the primitive

* Allow SynchronizerShiftReg to have a special case of 0 where we just assign out to in

* Allow SyncResetSynchronizerShiftReg to have a special case of 0 where we just assign out to in

* Synchronizer: don't touch the ports so that the primitive I/O is predictable even when data is constant

* travis: bump to python3-pexpect since gdbserver.py was bumped to python3

* Revert "travis: bump to python3-pexpect since gdbserver.py was bumped to python3"

This reverts commit 74ae7576cf643259de3227eacb0ac4f644361be2.

* Synchronizer: workaround for a chisel bug to keep I/O names stable

* Revert "Synchronizer: don't touch the ports so that the primitive I/O is predictable even when data is constant"

This reverts commit a9e83e42222e9ba5e616a408a09123f1fa10a39f.

Co-authored-by: Ryan Macdonald <rmac@sifive.com>